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PI3L110QX PDF预览

PI3L110QX

更新时间: 2024-11-15 10:50:59
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管
页数 文件大小 规格书
6页 359K
描述
Bus Exchanger, 3L Series, 1-Func, 4-Bit, True Output, CMOS, PDSO16, 0.150 INCH, PLASTIC, QSOP-16

PI3L110QX 数据手册

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PI3L110  
3.3V Quad, 2:1 Mux/DeMux  
Fast Ethernet LAN Switch w/ Single Enable  
Features  
Description  
• R is 4Ω typical  
The PI3L110 is a 8- to 4-bit multiplexer/demultiplexer LAN  
Switch with Hi-Z outputs. Industry leading advantages include a  
propagationdelayoflessthan250ps, resultingfromitslowchannel  
resistance and I/O capacitance.The device multiplexes differential  
outputs from a Fast Ethernet transceiver (PHY) device to one of  
two corresponding outputs. The switch is bidirectional and offers  
little or no attenuation of the high-speed signals at the outputs. It  
is designed for low bit-to-bit skew, high channel-to-channel noise  
isolation and is compatible with various standards, such as 10/100  
Base-T (Ethernet).  
ON  
• Low crosstalk: –27dB @ 250 MHz  
• Near-Zero propagation delay: 250ps  
• Switching speed: 9ns  
• Channel On capacitance: 9pF (typical)  
• V Operating Range: +3.0V to +3.6V  
CC  
• >2kV ESD protection (human body model)  
• >350 MHz bandwidth (or data frequency)  
• Switching on Data I/O Ports (0 to 5V)  
Generally, this part can be used to replace mechanical relays in  
low-voltage LAN applications that interface a physical layer over  
CAT 5 or CAT 6 unshielded twisted pair cable through an isolation  
transformer.  
• I  
supports Partial-Power-Down mode operation  
OFF  
• Data and Control Inputs have Undershoot Clamp Diodes  
• Packaging (Pb-free & Green available)  
– 16-pin 150-mil wide plastic QSOP (Q)  
– 16-pin 173-mil wide plastic TSSOP (L)  
The PI3L110 is fully specied for partial-power-down applications  
using I . The I  
feature ensures that damaging current will  
OFF  
OFF  
not backow thoughout the device when it is powered down. The  
device has isolation during Power Off.  
Applications  
• Dual Physical Layer Device sharing to one interface  
connector  
• Routes signals for 10/100 Mbit Ethernet  
Pin Conguration  
Block Diagram  
A
I
B
B
I
C
C
D
0
D
I 1  
A
1
I
0
1
I
0
I
1
I
I
0
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
S
IA0  
VCC  
E
IA1  
ID0  
ID1  
YD  
IC0  
IC1  
YC  
E
S
YA  
IB0  
IB1  
YB  
GND  
Y
Y
B
Y
C
Y
D
A
07-0076  
PS8690E  
03/23/07  
1

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