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PH2625L PDF预览

PH2625L

更新时间: 2024-11-17 22:26:35
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
13页 98K
描述
N-channel TrenchMOS?? logic level FET

PH2625L 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred包装说明:PLASTIC, LFPAK-4
针数:235Reach Compliance Code:not_compliant
ECCN代码:EAR99风险等级:5.17
雪崩能效等级(Eas):250 mJ外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:25 V
最大漏极电流 (ID):100 A最大漏源导通电阻:0.0041 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:MO-235
JESD-30 代码:R-PSSO-G4JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:4工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260极性/信道类型:N-CHANNEL
最大脉冲漏极电流 (IDM):300 A认证状态:Not Qualified
表面贴装:YES端子面层:Tin (Sn)
端子形式:GULL WING端子位置:SINGLE
处于峰值回流温度下的最长时间:30晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

PH2625L 数据手册

 浏览型号PH2625L的Datasheet PDF文件第2页浏览型号PH2625L的Datasheet PDF文件第3页浏览型号PH2625L的Datasheet PDF文件第4页浏览型号PH2625L的Datasheet PDF文件第5页浏览型号PH2625L的Datasheet PDF文件第6页浏览型号PH2625L的Datasheet PDF文件第7页 
PH2625L  
N-channel TrenchMOS™ logic level FET  
Rev. 02 — 24 February 2005  
Preliminary data sheet  
1. Product profile  
1.1 General description  
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic  
package using TrenchMOS™ technology.  
1.2 Features  
Optimized for use in DC-to-DC  
Very low switching and conduction  
losses  
converters  
Low threshold voltage  
Low thermal resistance.  
1.3 Applications  
DC-to-DC converters  
Voltage regulators  
Switched-mode power supplies  
Notebook computers.  
1.4 Quick reference data  
VDS 25 V  
ID 100 A  
Qgd = 7.3 nC (typ)  
RDSon 2.8 m(VGS = 10 V)  
Qg(tot) = 32 nC (typ)  
RDSon 4.1 m(VGS = 4.5 V).  
2. Pinning information  
Table 1:  
Pin  
Pinning  
Description  
Simplified outline  
Symbol  
1, 2, 3  
4
source  
D
S
gate  
mb  
mb  
mounting base; connected to drain  
G
mbb076  
1
2 3 4  
SOT669 (LFPAK)  

PH2625L 替代型号

型号 品牌 替代类型 描述 数据表
PH2525L,115 NXP

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PH2525L NXP

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