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PCD5092H-T PDF预览

PCD5092H-T

更新时间: 2024-01-01 18:55:53
品牌 Logo 应用领域
恩智浦 - NXP 控制器
页数 文件大小 规格书
16页 87K
描述
IC TELECOM, CORDLESS, BASEBAND CIRCUIT, PQFP100, PLASTIC, SOT-317-2, QFP-64, Cordless Telephone IC

PCD5092H-T 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:QFP,针数:100
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
JESD-30 代码:R-PQFP-G100JESD-609代码:e3
长度:20 mm功能数量:1
端子数量:100封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:RECTANGULAR
封装形式:FLATPACK认证状态:Not Qualified
座面最大高度:3.2 mm标称供电电压:3 V
表面贴装:YES技术:CMOS
电信集成电路类型:CORDLESS TELEPHONE BASEBAND CIRCUIT端子面层:TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD宽度:14 mm
Base Number Matches:1

PCD5092H-T 数据手册

 浏览型号PCD5092H-T的Datasheet PDF文件第1页浏览型号PCD5092H-T的Datasheet PDF文件第2页浏览型号PCD5092H-T的Datasheet PDF文件第4页浏览型号PCD5092H-T的Datasheet PDF文件第5页浏览型号PCD5092H-T的Datasheet PDF文件第6页浏览型号PCD5092H-T的Datasheet PDF文件第7页 
Philips Semiconductors  
Objective specification  
DECT baseband controller  
PCD5092  
Easy interfacing with radio circuits, operating at other  
supply voltage (RF supply pin with level shifter for RF  
signals)  
1
FEATURES  
80C51 ports P0, P1, P2 and P3 available for interfacing  
to display, keyboard, I2C-bus, interrupt sources and/or  
external memory. Integrated 64 kbyte ROM, 3 kbytes of  
data memory and 1 kbyte SDR-RAM. External program  
memory is addressable up to 128 kbytes  
On-chip comparator for use as data-slicer  
Low power oscillator with integrated frequency  
adjustment  
+2.7 to +5 V port (P0 to P3) interface  
QFP100 package  
TDMA frame (de)multiplexing. Transmission or  
Power-on-reset  
reception can be programmed for any slot.  
Programmable power-down modes  
Low supply voltage (2.7 to 3.6 V)  
CMOS technology.  
Ciphering, scrambling, CRC checking/generation and  
protected B-fields  
Speech and data buffering space for six handsets  
Local call and B-field loop-back  
1.1  
DSP software features  
Two interrupt lines for BML and DSP to interrupt 80C51  
ADPCM encoding and decoding complying with G.721  
u-law encoding and decoding complying with G.711  
Echo cancellation and network echo suppressor  
Speech filters  
On-chip, three-channel time-multiplexed 8-bit  
Analog-to-Digital Converter (ADC) for RSSI  
measurement, one for battery voltage measurement  
and one channel available for other purposes  
Programmable gain in speech paths  
Side tone and soft mute  
On-chip 8-bit Digital-to-Analog Converter (DAC) for  
electronic potentiometer function  
Phase error measurement and phase error correction by  
hardware  
Ringer and tone (DTMF) generator  
Automatic gain control  
DACs and ADCs for dynamic earpiece and dynamic or  
electret microphone  
Telephone Answering Machine (TAM) switch.  
For each DSP software version a separate manual is  
available in which detailed information is provided on how  
parameters must be set. For further information please  
contact Philips Semiconductors.  
On-chip reference voltage  
On-chip supply for electret microphone  
Very low ohmic buzzer output  
Serial interface to external ADPCM CODEC (PCD5032)  
or 8 kHz u-law samples  
2
GENERAL DESCRIPTION  
Speech switch for Digital Telephone Answering  
Machine (DTAM) connected to SPI interface  
The PCD5092 is designed for GAP-compliant single a/b  
line basestations with answering machine switch. It has an  
embedded 80C51 microcontroller with twice the  
performance of the classic architecture, 64 kbytes of  
PROM program memory and 3 kbytes of data memory  
on-chip. In addition there is 1 kbyte of on-chip data  
memory that is shared with on-chip Burst Mode Logic  
(BML) and DSP, the System Data RAM (SDR).  
IOM-2 interface (Siemens registered trademark)  
Serial interface to synthesizer for frequency  
programming  
Programmable polarity and timing of radio-control  
signals  
GMSK pulse shaper  
3
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
PCD5092H  
QFP100  
plastic quad flat package; 100 leads (lead length 1.95 mm);  
SOT317-2  
body 14 × 20 × 2.8 mm  
1997 Jul 21  
3

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