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PCA9534PW/DG,118 PDF预览

PCA9534PW/DG,118

更新时间: 2024-02-17 01:57:02
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管外围集成电路
页数 文件大小 规格书
27页 262K
描述
PCA9534 - 8-bit I2C-bus and SMBus low power I/O port with interrupt TSSOP 16-Pin

PCA9534PW/DG,118 技术参数

Source Url Status Check Date:2013-06-14 00:00:00生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:16Reach Compliance Code:unknown
风险等级:5.78JESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
I/O 线路数量:8端口数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH座面最大高度:1.1 mm
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

PCA9534PW/DG,118 数据手册

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PCA9534  
NXP Semiconductors  
8-bit I2C-bus and SMBus low power I/O port with interrupt  
Table 3.  
Pin description …continued  
Symbol  
Pin  
Description  
SO16, TSSOP16 HVQFN16  
IO6  
IO7  
INT  
SCL  
SDA  
VDD  
11  
12  
13  
14  
15  
16  
9
input/output 6  
10  
11  
12  
13  
14  
input/output 7  
interrupt output (open-drain)  
serial clock line  
serial data line  
supply voltage  
[1] HVQFN package die supply ground is connected to both VSS pin and exposed center pad. VSS pin must be  
connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level  
performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the  
board and for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in  
the thermal pad region.  
6. Functional description  
Refer to Figure 1 “Block diagram of PCA9534”.  
6.1 Registers  
6.1.1 Command byte  
Table 4.  
Command byte  
Command  
Protocol  
Function  
0
1
2
3
read byte  
Input Port register  
Output Port register  
Polarity Inversion register  
Configuration register  
read/write byte  
read/write byte  
read/write byte  
The command byte is the first byte to follow the address byte during a write transmission.  
It is used as a pointer to determine which of the following registers will be written or read.  
6.1.2 Register 0 - Input Port register  
This register is a read-only port. It reflects the incoming logic levels of the pins, regardless  
of whether the pin is defined as an input or an output by Register 3. Writes to this register  
have no effect.  
The default ‘X’ is determined by the externally applied logic level.  
PCA9534  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2017. All rights reserved.  
Product data sheet  
Rev. 4 — 7 November 2017  
5 of 27  
 
 
 
 

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