Datasheet > PAS302BCA-32

PAS302BCA-32

更新时间： 2022-12-21 20:21:14

品牌	Logo	应用领域
原相 - PIXART		传感器图像传感器
页数	文件大小	规格书
15页	343K
描述
CMOS VGA DIGITAL IMAGE SENSOR

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数据手册

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PAS302BCA-32 数据手册

PAS302BCA-32

CMOS Image Sensor IC

5. I²C^TMBus

PAS302BCA-32 supports I²C^TMbus transfer protocol and acts as slave device. The 7 bits

unique slave address is 1000000 and the bus supports receiving / transmitting speed up to

400kHz.

5.1. I²C^TMBus Overview

There are only two lines SDA (serial data) and SCL (serial clock) carry information between

the devices which are connected by I²C^TMbus. Normally both SDA and SCL lines are open

collector structure and pulled high by external pull-up resistors.

Only the master can initiate a transfer (start), generate clock signals, and terminate a transfer

(stop).

Start Condition :

A high to low transition of the SDA line while SCL is high defines a start condition.

Stop Condition :

A low to high transition of the SDA line while SCL is high defines a stop condition.

Valid Data:

The data on the SDA line must be stable during the high period of the SCL clock. Within each

byte, MSB is always transferred first. Read/write control bit is the LSB of the first byte.

Both the master and slave can transmit and receive data from the bus.

Acknowledge :

The receiving device should pull down the SDA line during high period of the SCL clock line

when a byte was transferred completely by transmitter. When in the case of that a master

received data from a slave, the master does not generate an acknowledgment on the last

byte to indicate the end of a master read cycle.

SDA

SCL

Start

Condition

Stop

Condition

Figure 5-1: Start and Stop Conditions

SDA

DATA

STABLE

CHANGE

ALLOWED

SCL

Figure 5-2: Valid Data

Version 2.3, 13 Sep. 2004

PixArt Imaging Inc.

E-mail: fae_service@pixart.com.tw

1...5 6 789 10 11...15

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