Datasheet > PAD500-TO-72

PAD500-TO-72

更新时间： 2023-02-26 16:00:32

品牌	Logo	应用领域
凌特 - Linear		/
页数	文件大小	规格书
11页	415K
描述
Rectifier Diode, 1 Element, 0.05A, Silicon, TO-72, METAL PACKAGE-3

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PAD500-TO-72 数据手册

Figure 1. Operational Amplifier Protection

Input Differential Voltage limited to 0.8V (typ) by JPADs D₁and D₂. Common

Mode Input voltage limited by JPADs D₃and D₄to ±15V.

Figure 2. Sample and Hold Circuit

Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset

voltages fed capacitively from the JFET switch gate.

FIGURE 1

FIGURE 2

+V -V

JPAD5

JPAD20

2N4117A

OP-27

2N4393

e_in

CONTROL

SIGNAL

V_OUT

+15V -15V

SOT-23

TO-92

TO-72

0.175

0.195

0.130

0.155

Three Lead

0.89

1.03

0.230

0.37

0.51

DIA.

0.045

0.060

0.195

0.209

DIA.

0.175

1.78

2.05

2.80

3.04

LS XXX

YYWW

0.170

0.195

0.030

MAX.

0.150

0.115

1.20

1.40

2.10

2.64

3 LEADS

0.500 MIN.

0.050

0.89

1.12

0.019

0.016

DIA.

0.014

0.020

0.016

0.022

0.500

0.610

0.085

0.180

0.100

0.013

0.100

0.55

DIMENSIONS IN

MILLIMETERS

0.095

0.105

DIMENSIONS

IN INCHES.

45°

0.046

0.036

0.048

0.028

1. Absolute maximum ratings are limiting values above which serviceability may be impaired.

2. The PAD type number denotes its maximum reverse current value in pico amperes. Devices with I_Rvalues intermediate to those shown

are available upon request.

Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its

use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Linear Integrated Systems.

Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261

123 4 5 6 7...11

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