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P89LPC938FHN PDF预览

P89LPC938FHN

更新时间: 2024-02-20 17:54:59
品牌 Logo 应用领域
恩智浦 - NXP 转换器闪存微控制器时钟
页数 文件大小 规格书
68页 306K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable Flash with 10-bit A/D converter

P89LPC938FHN 数据手册

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P89LPC938  
Philips Semiconductors  
8-bit microcontroller with 10-bit A/D converter  
2.2 Additional features  
A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns  
for all instructions except multiply and divide when executing at 18 MHz. This is six  
times the performance of the standard 80C51 running at the same clock frequency. A  
lower clock frequency for the same performance results in power savings and reduced  
EMI.  
Serial Flash ICP allows simple production coding with commercial EPROM  
programmers. Flash security bits prevent reading of sensitive application programs.  
Serial Flash ISP allows coding while the device is mounted in the end application.  
In-Application Programming of the Flash code memory. This allows changing the code  
in a running application.  
Watchdog timer with separate on-chip oscillator, requiring no external components.  
The watchdog prescaler is selectable from eight values.  
Low voltage reset (brownout detect) allows a graceful system shutdown when power  
fails. May optionally be configured as an interrupt.  
Idle and two different power-down reduced power modes. Improved wake-up from  
Power-down mode (a LOW interrupt input starts execution). Typical power-down  
current is 1 µA (total power-down with voltage comparators disabled).  
Active-LOW reset. On-chip power-on reset allows operation without external reset  
components. A reset counter and reset glitch suppression circuitry prevent spurious  
and incomplete resets. A software reset function is also available.  
Configurable on-chip oscillator with frequency range options selected by user  
programmed Flash configuration bits. Oscillator options support frequencies from  
20 kHz to the maximum operating frequency of 18 MHz.  
Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator  
allowing it to perform an oscillator fail detect function.  
Programmable port output configuration options: quasi-bidirectional, open drain,  
push-pull, input-only.  
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of  
the pins match or do not match a programmable pattern.  
LED drive capability (20 mA) on all port pins. A maximum limit is specified for the  
entire chip.  
Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns  
minimum ramp times.  
Only power and ground connections are required to operate the P89LPC938 when  
internal reset option is selected.  
Four interrupt priority levels.  
Eight keypad interrupt inputs, plus two additional external interrupt inputs.  
Schmitt trigger port inputs.  
Second data pointer.  
Emulation support.  
9397 750 14051  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 01 — 25 February 2005  
2 of 68  

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