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P89LPC952FA,512 PDF预览

P89LPC952FA,512

更新时间: 2024-01-16 18:05:41
品牌 Logo 应用领域
恩智浦 - NXP 时钟PC微控制器外围集成电路
页数 文件大小 规格书
69页 339K
描述
P89LPC952/954 - 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB/16 kB 3 V byte-erasable flash with 10-bit ADC LCC 44-Pin

P89LPC952FA,512 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LCC包装说明:PLASTIC, MS-018, SOT187-2, LCC-44
针数:44Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:7.94
具有ADC:YES其他特性:ALSO OPERATES AT 2.4V SUPPLY
地址总线宽度:位大小:8
CPU系列:8051最大时钟频率:18 MHz
DAC 通道:YESDMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQCC-J44
JESD-609代码:e3长度:16.585 mm
湿度敏感等级:3I/O 线路数量:40
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC44,.7SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
电源:2.5/3.3 V认证状态:Not Qualified
RAM(字节):512ROM(单词):8192
ROM可编程性:FLASH座面最大高度:4.57 mm
速度:18 MHz子类别:Microcontrollers
最大压摆率:23 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:16.585 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

P89LPC952FA,512 数据手册

 浏览型号P89LPC952FA,512的Datasheet PDF文件第2页浏览型号P89LPC952FA,512的Datasheet PDF文件第3页浏览型号P89LPC952FA,512的Datasheet PDF文件第4页浏览型号P89LPC952FA,512的Datasheet PDF文件第5页浏览型号P89LPC952FA,512的Datasheet PDF文件第6页浏览型号P89LPC952FA,512的Datasheet PDF文件第7页 
P89LPC952/954  
8-bit microcontroller with accelerated two-clock 80C51 core  
8 kB/16 kB 3 V byte-erasable flash with 10-bit ADC  
Rev. 04 — 24 July 2008  
Product data sheet  
1. General description  
The P89LPC952/954 is a single-chip microcontroller, available in low cost packages,  
based on a high performance processor architecture that executes instructions in two to  
four clocks, six times the rate of standard 80C51 devices. Many system-level functions  
have been incorporated into the P89LPC952/954 in order to reduce component count,  
board space, and system cost.  
2. Features  
2.1 Principal features  
I 8 kB/16 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte  
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.  
I 256-byte RAM data memory and a 256-byte auxiliary on-chip RAM.  
I 8-input multiplexed 10-bit ADC with window comparator that can generate an interrupt  
for in or out of range results. Two analog comparators with selectable inputs and  
reference source.  
I Two 16-bit counter/timers (each may be configured to toggle a port output upon timer  
overflow or to become a PWM output) and a 23-bit system timer that can also be used  
as a RTC.  
I Two enhanced UARTs with a fractional baud rate generator, break detect, framing  
error detection, and automatic address detection; 400 kHz byte-wide I2C-bus  
communication port and SPI communication port.  
I High-accuracy internal RC oscillator option, with clock doubler option, allows operation  
without external oscillator components. The RC oscillator option is selectable and fine  
tunable. Fast switching between the internal RC oscillator and any oscillator source  
provides optimal support of minimal power active mode with fast switching to  
maximum performance.  
I 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or  
driven to 5.5 V).  
I 44-pin and 48-pin packages with 40 and 42 I/O pins minimum while using on-chip  
oscillator and reset options.  
I Port 5 has high current sourcing/sinking (20 mA) for all Port 5 pins. All other port pins  
have high sinking capability (20 mA). A maximum limit is specified for the entire chip.  
I Watchdog timer with separate on-chip oscillator, requiring no external components.  
The watchdog prescaler is selectable from eight values.  
 
 
 

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