Datasheet > P4C168L-55LMB

P4C168L-55LMB

更新时间： 2024-11-29 08:41:03

品牌	Logo	应用领域
PYRAMID		静态存储器
页数	文件大小	规格书
14页	628K
描述
Standard SRAM, 4KX4, 55ns, CMOS, CQCC20, 0.290 X 0.430 INCH, CERAMIC, LCC-20

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P4C168L-55LMB 数据手册

P4C168/P4C168L , P4C169, P4C170

ULTRA HIGH SPEED 4K x 4

STATIC CMOS RAMS

FEATURES

Full CMOS, 6T Cell

Three Options

– P4C168 Low Power Standby Mode

– P4C169 Fast Chip Select Control

– P4C170 Fast Chip Select, Output Enable

Controls

High Speed (Equal Access and Cycle Times)

– 12/15/20/25/35ns (Commercial)

– 20/25/35/45/55/70ns (P4C168 Military)

Low Power Operation (Commercial)

– 715 mW Active

– 193 mW Standby (TTL Input) P4C168

– 83 mW Standby (CMOS Input) P4C168

Standard Pinout (JEDEC Approved)

– P4C168: 20-pin DIP, SOJ, LCC, SOIC,

CERPACK, and Flat Pack

– P4C169: 20-pin DIP and SOIC

– P4C170: 22-pin DIP

Single 5V±10% Power Supply

Fully TTL Compatible, Common I/O Ports

DESCRIPTION

The P4C168, P4C169 and P4C170 are a family of

16,384-bit ultra high-speed static RAMs organized as

4K x 4. All three devices have common input/output

ports.The P4C168 enters the standby mode when the

chip enable (CE) control goes HIGH; with CMOS input

levels, power consumption is only 83mW in this mode.

Both the P4C169 and the P4C170 offer a fast chip select

access time that is only 67% of the address access time.

In addition, the P4C170 includes an output enable (OE)

controltoeliminatedatabuscontention.TheRAMsoper-

ate from a single 5V ± 10% tolerance power supply.

Access times as fast as 12 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is used to reduce power consumption to a low

715 mW active, 193 mW standby.

TheP4C168andP4C169areavailablein20-pin(P4C170

in 22-pin) 300 mil DIP packages providing excellent

board level densities. The P4C168 is also available in

20-pin 300 mil SOIC, SOJ, CERPACK, and Flat Pack

packages.

The P4C169 is also available in a 20-pin 300 mil SOIC

package.

PIN CONFIGURATIONS

FUNCTIONAL BLOCK DIAGRAM

P4C170

DIP (P3)

P4C168

DIP (P2, C6, D2)

SOIC (S2)

P4C169

DIP (P2)

SOIC (S2)

SOJ (J2)

CERPACK (F2)

SOLDER SEAL FLAT PACK (FS-2)

Document # SRAM107 REV E

Revised March 2010

12 3 4 5 6 7...14

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