Datasheet > 存储 > SRAM> P4C168-35LC

P4C168-35LC

更新时间： 2024-11-26 04:55:07

品牌	Logo	应用领域
PYRAMID		/
页数	文件大小	规格书
15页	234K
描述
ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS

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中文翻译

获取价格

数据手册

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P4C168-35LC 数据手册

P4C168, P4C169, P4C170

ULTRA HIGH SPEED 4K x 4

STATIC CMOS RAMS

FEATURES

Full CMOS, 6T Cell

Fully TTL Compatible, Common I/O Ports

Three Options

High Speed (Equal Access and Cycle Times)

– 12/15/20/25/35ns (Commercial)

– P4C168 Low Power Standby Mode

– P4C169 Fast Chip Select Control

– P4C170 Fast Chip Select, Output Enable

Controls

– 20/25/35/45/55/70ns (P4C168 Military)

Low Power Operation (Commercial)

– 715 mW Active

Standard Pinout (JEDEC Approved)

– 193 mW Standby (TTL Input) P4C168

– 83 mW Standby (CMOS Input) P4C168

– P4C168: 20-pin DIP, SOJ, LCC, SOIC,

CERPACK, and Flat Pack

Single 5V±10% Power Supply

– P4C169: 20-pin DIP and SOIC

– P4C170: 22-pin DIP

DESCRIPTION

Access times as fast as 12 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOSisusedtoreducepowerconsumptiontoalow715

mW active, 193 mW standby.

The P4C168, P4C169 and P4C170 are a family of

16,384-bitultrahigh-speedstaticRAMsorganizedas4K

x4. Allthreedeviceshavecommoninput/outputports.The

P4C168 enters the standby mode when the chip enable

(CE) control goes HIGH; with CMOS input levels, power

consumptionisonly83mWinthismode.BoththeP4C169

and the P4C170 offer a fast chip select access time that

is only 67% of the address access time. In addition, the

P4C170 includes an output enable (OE) control to elimi-

nate data bus contention. The RAMs operate from a

single 5V ± 10% tolerance power supply.

TheP4C168andP4C169areavailablein20-pin(P4C170

in 22-pin) 300 mil DIP packages providing excellent

boardleveldensities. TheP4C168isalsoavailablein20-

pin 300 mil SOIC, SOJ, CERPACK, and Flat Pack

packages.

The P4C169 is also available in a 20-pin 300 mil SOIC

package.

PIN CONFIGURATIONS

FUNCTIONAL BLOCK DIAGRAM

P4C170

P4C168

P4C169

DIP (P2)

SOIC (S2)

DIP (P3)

DIP (P2, C6, D2)

SOIC (S2)

SOJ (J2)

CERPACK (F2)

SOLDER SEAL FLAT PACK (FS-2)

Document # SRAM107 REV A

Revised October 2005

12 3 4 5 6 7...15

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