QorIQ Communications Platforms
P Series
QorIQ P1015 and P1024
communications processors
The P1015 and P1024 processors are
the two QorIQ platforms deliver an impressive
4.5x aggregate frequency range.
Overview
perfectly suited for multi-service gateways,
Ethernet switch controllers, wireless LAN
access points and high-performance general-
purpose control processor applications with
tight thermal constraints.
Freescale QorIQ communications platforms are
the next-generation evolution of our leading
PowerQUICC communications processors.
Built using high-performance Power
Architecture® cores, QorIQ platforms enable
a new era of networking innovation where the
reliability, security and quality of service for
every connection matters.
The P1015 and P1024 platforms both feature
the e500 Power Architecture core and
peripherals, and are fully software compatible
with the existing PowerQUICC processors. This
enables you to create a product with multiple
performance points with a common software
architecture. The P1024 dual-core processor
supports both symmetric and asymmetric
processing, enabling you to further optimize
your design with the same applications running
on each core or serialize your application using
the cores for different processing tasks.
The P1015 and P1024 processors are pin-
compatible with the QorIQ P1016, P1025
products, and software compatible with the
P1011/P1020 and P2010/P2020 offering a six-
chip range of cost-effective solutions. Scaling
from a single core at 400 MHz (P1015) to a
dual core at 1.2 GHz per core (P2020),
QorIQ P1015 and P1024
Communications Processors
The QorIQ P1 family, which includes the P1015
and P1024 communications processors, offers
the value of smart integration and efficient
power for a wide variety of applications in the
networking, telecom, defense and industrial
markets. Based on 45 nm technology for low
power, the P1015 and P1024 processors
provide single- and dual-core options from
400 MHz to 667 MHz, together with advanced
security and a rich set of interfaces.
QorIQ P1015 and P1024 Block Diagram
Not on P1015
Security
Acceleration
DDR3 SDRAM
Controller
Power Architecture®
e500 Core
Power Architecture
e500 Core
256 KB
L2 Cache
XOR
32 KB
32 KB
32 KB
L1 I Cache
32 KB
L1 D Cache
DUART, 2x I2C, Timers,
Interrupt Control,
SD/MMC, SPI,
L1 I Cache L1 D Cache
2x USB 2.0/ULPI
Coherency Module
System Bus
Enhanced Local Bus
Controller (eLBC)
3x
On-Chip Network
Gigabit
Ethernet
TDM
2x PCI Express® 4-ch. DMA Controller
4-lane SerDes
Core Complex (CPU, L2 and Frontside CoreNet Platform Cache)
Accelerators and Memory Control Networking Elements
Basic Peripherals and Interconnect