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OPA620KG

更新时间： 2024-02-17 08:15:21
品牌 Logo 应用领域
德州仪器 - TI 放大器
页数 文件大小 规格书
16页 233K
描述
OPERATIONAL AMPLIFIER

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OPA620KG 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
Reach Compliance Code：unknown风险等级：5.81
放大器类型：OPERATIONAL AMPLIFIER架构：VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB)：40 µA25C 时的最大偏置电流 (IIB)：30 µA
最小共模抑制比：65 dB标称共模抑制比：75 dB
频率补偿：YES最大输入失调电压：1000 µV
JESD-30 代码：R-CDIP-T8JESD-609代码：e0
低-偏置：NO低-失调：NO
微功率：NO负供电电压上限：-7 V
标称负供电电压 (Vsup)：-5 V功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DIP封装等效代码：DIP8,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED功率：NO
电源：+-5 V可编程功率：NO
认证状态：Not Qualified最小摆率：175 V/us
标称压摆率：250 V/us子类别：Operational Amplifiers
最大压摆率：25 mA供电电压上限：7 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：BIPOLAR温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED标称均一增益带宽：200000 kHz
最小电压增益：316宽带：YES
Base Number Matches：1

OPA620KG 数据手册

 浏览型号OPA620KG的Datasheet PDF文件第8页浏览型号OPA620KG的Datasheet PDF文件第9页浏览型号OPA620KG的Datasheet PDF文件第10页浏览型号OPA620KG的Datasheet PDF文件第12页浏览型号OPA620KG的Datasheet PDF文件第13页浏览型号OPA620KG的Datasheet PDF文件第14页 
Many demanding high-speed applications such as ADC/  
DAC buffers require op amps with low wideband output  
impedance. For example, low output impedance is essential  
when driving the signal-dependent capacitances at the inputs  
of flash A/D converters. As shown in Figure 3, the OPA620  
maintains very low closed-loop output impedance over  
frequency. Closed-loop output impedance increases with  
frequency since loop gain is decreasing with frequency.  
When the output is shorted to ground, PDL = 5V x 150mA =  
750mW. Thus, PD = 230mW + 750mW ≈ 1W. Note that the  
short-circuit condition represents the maximum amount of  
internal power dissipation that can be generated. Thus, the  
“Maximum Power Dissipation” curve starts at 1W and is  
derated based on a 175°C maximum junction temperature  
and the junction-to-ambient thermal resistance, θJA, of each  
package. The variation of short-circuit current with tempera-  
ture is shown in Figure 5.  
10  
250  
1
+ISC  
200  
G = +10V/V  
0.1  
150  
– ISC  
G = +1V/V  
G = +2V/V  
100  
0.01  
100  
1k  
10k  
100k  
1M  
10M  
100M  
50  
Frequency (Hz)  
–75  
–50  
–25  
0
+25  
+50  
+75 +100 +125  
FIGURE 3. Small-Signal Output Impedance vs Frequency.  
Ambient Temperature (°C)  
THERMAL CONSIDERATIONS  
FIGURE 5. Short-Circuit Current vs Temperature.  
The OPA620 does not require a heat sink for operation in  
most environments. The use of a heat sink, however, will  
reduce the internal thermal rise and will result in cooler,  
more reliable operation. At extreme temperatures and under  
full load conditions a heat sink is necessary. See “Maximum  
Power Dissipation” curve, Figure 4.  
CAPACITIVE LOADS  
The OPA620’s output stage has been optimized to drive  
resistive loads as low as 50Ω. Capacitive loads, however,  
will decrease the amplifier’s phase margin which may cause  
high frequency peaking or oscillations. Capacitive loads  
greater than 20pF should be buffered by connecting a small  
resistance, usually 5Ω to 25Ω, in series with the output as  
shown in Figure 6. This is particularly important when  
driving high capacitance loads such as flash A/D converters.  
1.2  
Plastic DIP, SO-8  
Packages  
1.0  
0.8  
In general, capacitive loads should be minimized for  
optimum high frequency performance. Coax lines can be  
driven if the cable is properly terminated. The capacitance of  
coax cable (29pF/foot for RG-58) will not load the amplifier  
when the coaxial cable or transmission line is terminated in  
its characteristic impedance.  
Cerdip  
Package  
0.6  
0.4  
0.2  
0
0
+25  
+50  
+75  
+100  
+125  
+150  
(RS typically 5Ω to 25Ω)  
Ambient Temperature (°C)  
FIGURE 4. Maximum Power Dissipation.  
RS  
The internal power dissipation is given by the equation PD =  
DQ + PDL, where PDQ is the quiescent power dissipation and  
OPA620  
P
PDL is the power dissipation in the output stage due to the  
load. (For ±VCC = ±5V, PDQ = 10V x 23mA = 230mW, max).  
For the case where the amplifier is driving a grounded load  
(RL) with a DC voltage (±VOUT) the maximum value of PDL  
occurs at ±VOUT = ±VCC/2, and is equal to PDL, max =  
(±VCC)2/4RL. Note that it is the voltage across the output  
transistor, and not the load, that determines the power  
dissipated in the output stage.  
RL  
CL  
FIGURE 6. Driving Capacitive Loads.  
®
11  
OPA620  
1...891011121314...16

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