Quad Low Offset, Low Power
Operational Amplifier
Data Sheet
OP400
FUNCTIONAL BLOCK DIAGRAMS
FEATURES
Low input offset voltage: 150 µV maximum
Low offset voltage drift over –55°C to +125°C: 1.2 μV/°C
maximum
Low supply current (per amplifier): 725 µA maximum
High open-loop gain: 5000 V/mV minimum
Input bias current: 3 nA maximum
Low noise voltage density: 11 nV/√Hz at 1 kHz
Stable with large capacitive loads: 10 nF typical
Available in die form
OUTA
–IN A
+IN A
V+
1
2
3
4
5
6
7
8
16 OUT D
15 –IN D
14 +IN D
13 V–
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
–
+
+
–
–
–
+
+
–
–
OP400
+IN B
–IN B
OUT B
NC
12 +IN C
11 –IN C
10 OUT C
OP400
–
–
+
+
+IN B
–IN B
OUT B
10 +IN C
+
+
9
8
–IN C
9
NC
OUT C
NC = NO CONNECT
Figure 1. 14-Pin Ceramic DIP (Y-Suffix)
and 14-Pin Plastic DIP (P-Suffix)
Figure 2. 16-Pin SOIC (S-Suffix)
GENERAL DESCRIPTION
The OP400 is the first monolithic quad operational amplifier
that features OP77-type performance. Precision performance is
not sacrificed with the OP400 to obtain the space and cost
savings offered by quad amplifiers.
The OP400 features low power consumption, drawing less than
725 µA per amplifier. The total current drawn by this quad
amplifier is less than that of a single OP07, yet the OP400 offers
significant improvements over this industry-standard op amp.
Voltage noise density of the OP400 is a low 11 nV/√Hz at
10 Hz, half that of most competitive devices.
The OP400 features an extremely low input offset voltage of less
than 150 µV with a drift of less than 1.2 µV/°C, guaranteed over
the full military temperature range. Open-loop gain of the
OP400 is more than 5 million into a 10 kΩ load, input bias
current is less than 3 nA, CMR is more than 120 dB, and PSRR
is less than 1.8 µV/V. On-chip Zener zap trimming is used to
achieve the low input offset voltage of the OP400 and eliminates
the need for offset nulling. The OP400 conforms to the industry-
standard quad pinout, which does not have null terminals.
The OP400 is an ideal choice for applications requiring multiple
precision operational amplifiers and where low power
consumption is critical.
V+
BIAS
VOLTAGE
LIMITING
NETWORK
OUT
+IN
–IN
V–
Figure 3. Simplified Schematic (One of Four Amplifiers Is Shown)
Rev. H
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