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NP15P06SLG-E1-AY PDF预览

NP15P06SLG-E1-AY

更新时间: 2024-02-12 09:24:05
品牌 Logo 应用领域
日电电子 - NEC 开关脉冲晶体管
页数 文件大小 规格书
7页 194K
描述
Power Field-Effect Transistor, 15A I(D), 60V, 0.095ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, MP-3ZK, TO-252, 3 PIN

NP15P06SLG-E1-AY 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TO-252AA包装说明:SMALL OUTLINE, R-PSSO-G2
针数:4Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.29.00.95
风险等级:5.32雪崩能效等级(Eas):19 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:60 V最大漏极电流 (ID):15 A
最大漏源导通电阻:0.095 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:TO-252AAJESD-30 代码:R-PSSO-G2
JESD-609代码:e3元件数量:1
端子数量:2工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:P-CHANNEL最大脉冲漏极电流 (IDM):45 A
认证状态:Not Qualified表面贴装:YES
端子面层:MATTE TIN端子形式:GULL WING
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

NP15P06SLG-E1-AY 数据手册

 浏览型号NP15P06SLG-E1-AY的Datasheet PDF文件第1页浏览型号NP15P06SLG-E1-AY的Datasheet PDF文件第3页浏览型号NP15P06SLG-E1-AY的Datasheet PDF文件第4页浏览型号NP15P06SLG-E1-AY的Datasheet PDF文件第5页浏览型号NP15P06SLG-E1-AY的Datasheet PDF文件第6页浏览型号NP15P06SLG-E1-AY的Datasheet PDF文件第7页 
NP15P06SLG  
ELECTRICAL CHARACTERISTICS (TA = 25°C)  
CHARACTERISTICS  
Zero Gate Voltage Drain Current  
Gate Leakage Current  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX.  
10  
UNIT  
μA  
μA  
V
IDSS  
VDS = 60 V, VGS = 0 V  
IGSS  
VGS = m20 V, VDS = 0 V  
VDS = VGS, ID = 250 μA  
VDS = 10 V, ID = 7.5 A  
VGS = 10 V, ID = 7.5 A  
VGS = 4.5 V, ID = 7.5 A  
VDS = 10 V,  
m10  
Gate to Source Threshold Voltage  
Forward Transfer Admittance Note  
Drain to Source On-state Resistance Note  
VGS(th)  
| yfs |  
RDS(on)1  
RDS(on)2  
Ciss  
1.0  
1.6  
12  
2.5  
6
S
<R>  
<R>  
56  
70  
95  
mΩ  
mΩ  
pF  
pF  
pF  
ns  
62  
Input Capacitance  
1100  
150  
100  
7
Output Capacitance  
Reverse Transfer Capacitance  
Turn-on Delay Time  
Rise Time  
Coss  
Crss  
VGS = 0 V,  
f = 1 MHz  
td(on)  
tr  
VDD = 30 V, ID = 7.5 A,  
VGS = 10 V,  
5
ns  
Turn-off Delay Time  
Fall Time  
td(off)  
tf  
RG = 0 Ω  
100  
65  
ns  
ns  
Total Gate Charge  
QG  
VDD = 48 V,  
23  
nC  
nC  
nC  
V
Gate to Source Charge  
Gate to Drain Charge  
Body Diode Forward Voltage Note  
Reverse Recovery Time  
Reverse Recovery Charge  
QGS  
QGD  
VF(S-D)  
trr  
VGS = 10 V,  
3
<R>  
ID = 15 A  
7
IF = 15 A, VGS = 0 V  
IF = 15 A, VGS = 0 V,  
di/dt = 100 A/μs  
0.96  
37  
1.5  
ns  
Qrr  
45  
nC  
Note Pulsed test PW 350 μs, Duty Cycle 2%  
TEST CIRCUIT 2 SWITCHING TIME  
TEST CIRCUIT 1 AVALANCHE CAPABILITY  
D.U.T.  
D.U.T.  
L
R
G
= 25 Ω  
V
V
GS()  
R
L
90%  
V
GS  
V
GS  
10%  
0
V
DD  
50 Ω  
PG.  
GS = 20 0 V  
Wave Form  
R
G
V
PG.  
V
DD  
DS()  
90%  
90%  
BVDSS  
I
AS  
V
DS  
V
0
GS()  
V
DS  
10% 10%  
V
DS  
0
Wave Form  
I
D
t
d(on)  
t
r
t
d(off)  
t
f
VDD  
τ
t
on  
t
off  
τ = 1  
μ
s
Starting Tch  
Duty Cycle 1%  
TEST CIRCUIT 3 GATE CHARGE  
D.U.T.  
I
G
= 2 mA  
RL  
PG.  
V
DD  
50 Ω  
2
Data Sheet D19078EJ2V0DS  

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