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NM27C128N90 PDF预览

NM27C128N90

更新时间: 2024-11-15 15:46:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD OTP只读存储器光电二极管内存集成电路
页数 文件大小 规格书
11页 112K
描述
OTP ROM, 16KX8, 90ns, CMOS, PDIP28, PLASTIC, DIP-28

NM27C128N90 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP28,.6
针数:28Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.7最长访问时间:90 ns
I/O 类型:COMMONJESD-30 代码:R-PDIP-T28
JESD-609代码:e0长度:35.942 mm
内存密度:131072 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:28字数:16384 words
字数代码:16000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP28,.6封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
编程电压:12.75 V认证状态:Not Qualified
座面最大高度:5.334 mm最大待机电流:0.0001 A
子类别:OTP ROMs最大压摆率:0.035 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

NM27C128N90 数据手册

 浏览型号NM27C128N90的Datasheet PDF文件第2页浏览型号NM27C128N90的Datasheet PDF文件第3页浏览型号NM27C128N90的Datasheet PDF文件第4页浏览型号NM27C128N90的Datasheet PDF文件第5页浏览型号NM27C128N90的Datasheet PDF文件第6页浏览型号NM27C128N90的Datasheet PDF文件第7页 
July 1998  
NM27C128  
131,072-Bit (16K x 8) High Performance CMOS EPROM  
The NM27C128 is one member of a high density EPROM Family  
which range in densities up to 4 Mb.  
General Description  
The NM27C128 is a high performance 128K UV Erasable Electri-  
cally Programmable Read Only Memory. It is manufactured with  
Fairchild’s latest CMOS split gate EPROM technology which  
enables it to operate at speeds as fast as 90 ns access time over  
the full operating range.  
Features  
High performance CMOS  
90 ns access time  
Fast turn-off for microprocessor compatibility  
The NM27C128 provides microprocessor-based systems exten-  
sive storage capacity for large portions of operating system and  
application software. Its 90 ns access time provides high speed  
operation with high-performance CPUs. The NM27C128 offers a  
JEDEC standard pin configuration  
28-pin PDIP package  
32-pin chip carrier  
28-pin CERDIP package  
single chip solution for the code storage requirements of 100%  
firmware-based equipment. Frequently-used software routines  
are quickly executed from EPROM storage, greatly enhancing  
system utility.  
Drop-in replacement for 27C128 or 27128  
40% faster programming time with Fairchild’s turbo algorithm  
The NM27C128 is configured in the standard EPROM pinout  
which provides an easy upgrade path for systems which are  
currently using standard EPROMs.  
Block Diagram  
V
CC  
GND  
Data Outputs O - O  
0
7
V
PP  
OE  
Output Enable,  
and Chip  
PGM  
CE  
Output  
Buffers  
Enable Logic  
Y Gating  
Y Decoder  
A
- A  
14  
0
Address  
Inputs  
131,072-Bit  
Cell Matrix  
X Decoder  
DS011329-1  
1
© 1998 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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