Datasheet > NL27WZ16_12

NL27WZ16_12

更新时间： 2024-09-28 12:22:51

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
6页	116K
描述
Dual Buffer

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中文翻译

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数据手册

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NL27WZ16_12 数据手册

NL27WZ16

Dual Buffer

The NL27WZ16 is a high performance dual buffer operating from a

1.65 to 5.5 V supply. At V = 3 V, high impedance TTL compatible

inputs significantly reduce current loading to input drivers while TTL

compatible outputs offer improved switching noise performance.

http://onsemi.com

Features

• Extremely High Speed: t 2.0 ns (typical) at V = 5 V

MARKING

DIAGRAMS

• Designed for 1.65 V to 5.5 V V Operation

• Over Voltage Tolerant Inputs

• LVTTL Compatible − Interface Capability With 5 V TTL Logic

SC−88/SC−70−6/SOT−363

DF SUFFIX

with V = 3 V

MR M G

• LVCMOS Compatible

• 24 mA Balanced Output Sink and Source Capability

• Near Zero Static Supply Current Substantially Reduces System

Power Requirements

• Chip Complexity: FET = 72; Equivalent Gate = 18

• These Devices are Pb−Free and are RoHS Compliant

CASE 419B

TSOP−6

DT SUFFIX

CASE 318G

MR M G

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

MR = Device Code

= Date Code*

= Pb−Free Package

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary

depending upon manufacturing location.

IN A1

GND

IN A2

OUT Y1

PIN ASSIGNMENT

Function

IN A1

OUT Y2

GND

IN A2

Figure 1. Pinout (Top View)

OUT Y2

OUT Y1

IN A1

IN A2

OUT Y1

OUT Y2

FUNCTION TABLE

A Input

Y Output

Figure 2. Logic Symbol

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Semiconductor Components Industries, LLC, 2012

Publication Order Number:

May, 2012 − Rev. 9

NL27WZ16/D

12 3 4 5 6

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