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NL27WZ16MU3TCG

更新时间： 2024-09-29 11:01:43

品牌	Logo	应用领域
安森美 - ONSEMI		栅栅极
页数	文件大小	规格书
6页	76K
描述
双缓冲器

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中文翻译

获取价格

数据手册

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NL27WZ16MU3TCG 数据手册

NL27WZ16

Dual Buffer

The NL27WZ16 is a high performance dual buffer operating from a

1.65 to 5.5 V supply. At V = 3 V, high impedance TTL compatible

inputs significantly reduce current loading to input drivers while TTL

compatible outputs offer improved switching noise performance.

http://onsemi.com

Features

• Extremely High Speed: t 2.0 ns (typical) at V = 5 V

• Designed for 1.65 V to 5.5 V V Operation

MARKING

DIAGRAMS

• Over Voltage Tolerant Inputs

• LVTTL Compatible − Interface Capability With 5 V TTL Logic

SC−88/SC−70−6/SOT−363

DF SUFFIX

with V = 3 V

MR M G

• LVCMOS Compatible

CASE 419B

• 24 mA Balanced Output Sink and Source Capability

• Near Zero Static Supply Current Substantially Reduces System

Power Requirements

• Chip Complexity: FET = 72; Equivalent Gate = 18

• Pb−Free Packages are Available

TSOP−6

DT SUFFIX

CASE 318G

MR M G

MR = Device Code

= Date Code*

= Pb−Free Package

OUT Y1

IN A1

GND

(Note: Microdot may be in either location)

*Date Code orientation and/or position and underbar

may vary depending upon manufacturing location.

OUT Y2

IN A2

PIN ASSIGNMENT

Figure 1. Pinout (Top View)

IN A1

GND

IN A2

OUT Y2

IN A1

IN A2

OUT Y1

OUT Y2

OUT Y1

FUNCTION TABLE

Figure 2. Logic Symbol

A Input

Y Output

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

February, 2007 − Rev. 5

NL27WZ16/D

12 3 4 5 6

中文翻译

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