Datasheet > NL17SZ175MU1TCG

NL17SZ175MU1TCG

更新时间： 2024-11-23 19:37:59

品牌	Logo	应用领域
安森美 - ONSEMI		逻辑集成电路
页数	文件大小	规格书
11页	264K
描述
D Flip-Flop

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中文翻译

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技术参数
数据手册

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NL17SZ175MU1TCG 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.7	逻辑集成电路类型：	D FLIP-FLOP
Base Number Matches：	1

NL17SZ175MU1TCG 数据手册

D-Type Flip-Flop with

Asynchronous Clear

NL17SZ175

The NL17SZ175 is a single, positive edge triggered, D−type CMOS

Flip−Flop with Asynchronous Clear operating from a 1.65 V to 5.5 V

supply.

www.onsemi.com

Features

MARKING

DIAGRAMS

• Designed for 1.65 V to 5.5 V V Operation

• 2.0 ns t at V = 5 V (Typ)

• Inputs/Outputs Overvoltage Tolerant up to 5.5 V

SC−88

CASE 419B−02

• I

Supports Partial Power Down Protection

• Sink 32 mA at 4.5 V

XXXM

OFF

• Available in SC−88, SC−74 and UDFN6 Packages

• Chip Complexity < 100 FETs

SC−74

CASE 318F−05

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

XXX MG

Compliant

IEEC / IEC

UDFN6

1.45 x 1.0

CASE 517AQ

Figure 1. Logic Symbol

UDFN6

1.0 x 1.0

CASE 517BX

X M

X, XXX = Specific Device Code

= Date Code*

= Work Week

= Pb−Free Package

(Note: Microdot may be in either location)

*Date Code orientation and/or position may

vary depending upon manufacturing location.

ORDERING INFORMATION

See detailed ordering, marking and shipping information in the

package dimensions section on page 7 of this data sheet.

Publication Order Number:

November, 2019 − Rev. 0

NL17SZ175/D

12 3 4 5 6 7...11

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