Datasheet > NL17SZ00_06

NL17SZ00_06

更新时间： 2024-11-24 03:46:23

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
6页	69K
描述
Single 2−Input NAND Gate

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中文翻译

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数据手册

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NL17SZ00_06 数据手册

NL17SZ00

Single 2−Input NAND Gate

The NL17SZ00 is a single 2−input NAND Gate in two tiny footprint

packages. The device performs much as LCX multi−gate products in

speed and drive.

Features

http://onsemi.com

• Tiny SOT−353 and SOT−553 Packages

• 2.7 ns T at 5 V (typ)

MARKING

DIAGRAMS

• Source/Sink 24 mA at 3.0 V

• Over−Voltage Tolerant Inputs

• Pin For Pin with NC7SZ00P5X, TC7SZ00FU and TC7SZ00AFE

L1 MG

SOT−353/SC70−5/SC−88A

DF SUFFIX

• Chip Complexity: FETs = 20

CASE 419A

• Designed for 1.65 V to 5.5 V V Operation

L1 = Specific Device Marking

= Date Code

= Pb−Free Package

• Pb−Free Packages are Available

(Note: Microdot may be in either location)

L1 M

SOT−553

XV5 SUFFIX

CASE 463B

L1 = Specific Device Marking

= Date Code

GND

PIN ASSIGNMENT

Function

Figure 1. Pinout (Top View)

GND

Figure 2. Logic Symbol

FUNCTION TABLE

Output

Input

Y = AB

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

November, 2006 − Rev. 5

NL17SZ00/D

12 3 4 5 6

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