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NJU6367PC-D PDF预览

NJU6367PC-D

更新时间: 2024-11-15 15:46:31
品牌 Logo 应用领域
NJRC 时钟外围集成电路晶体
页数 文件大小 规格书
6页 49K
描述
Clock Generator, 50MHz, CMOS, DIE-6

NJU6367PC-D 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIE
包装说明:DIE,针数:6
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.22
JESD-30 代码:R-XUUC-N6端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:50 MHz封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP峰值回流温度(摄氏度):260
主时钟/晶体标称频率:50 MHz认证状态:Not Qualified
最大供电电压:5.5 V最小供电电压:2 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子位置:UPPER
处于峰值回流温度下的最长时间:NOT SPECIFIEDuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

NJU6367PC-D 数据手册

 浏览型号NJU6367PC-D的Datasheet PDF文件第2页浏览型号NJU6367PC-D的Datasheet PDF文件第3页浏览型号NJU6367PC-D的Datasheet PDF文件第4页浏览型号NJU6367PC-D的Datasheet PDF文件第5页浏览型号NJU6367PC-D的Datasheet PDF文件第6页 
NJU6367 Series  
Fundamental Quartz Crystal Oscillator  
GENERAL DESCRIPTION  
PACKAGE OUTLINE  
The NJU6367 series is a C-MOS fundamental quartz crystal  
oscillator that consists of an oscillation amplifier, 3-stage  
divider and 3-state output buffer.  
The 3-stage divider generates only one frequency selected  
of f0,f0/2,f0/4 f0/8, f0/16 and f0/32 by internal circuits is output.  
The oscillation amplifier is realized very low stand-by current  
using NAND circuit.  
NJU6367XC-D  
The 3-state output buffer is C-MOS compatible.  
FEATURES  
Operating Voltage  
PAD LOCATION  
2.0 to 5.5V  
Thin-Chip  
Maximum Oscillation Frequency  
50MHz  
CONT  
XT  
VDD  
Low Operating Current  
High Fan-out  
IOH/IOL=5mA@2.5V  
IOH/IOL=6mA@3.0V  
IOH/IOL=12mA@5.0V  
XT  
VSS  
FOUT  
3-Stage Divider Maximum Divider f0/32  
Oscillation Stop and Output Stand-by Function  
3-State Output Buffer  
Oscillation Capacitors Cg and Cg on-chip  
Package Outline  
Thin-Chip  
C-MOS Technology  
LINE-UP TABLE  
COORDINATES  
Type No.  
NJU6367  
FOUT  
f0  
Internal Connect  
Connected A Line  
Connected B Line  
Connected C Line 23/23pF  
Connected D Line 23/23pF  
Connected E Line  
Connected F Line  
Connected A Line  
Cg/Cd  
23/23pF  
23/23pF  
No Pad Name  
X
Y
A
B
C
D
E
F
1
2
3
-178  
-178  
-178  
231  
77  
CONT  
XT  
f0/2  
f0/4  
f0/8  
f0/16  
f0/32  
f0  
-77  
XT  
VSS  
23/23pF  
23/23pF  
Non  
4
5
6
-178  
206  
206  
-231  
-231  
231  
FOUT  
VDD  
P
Starting Point:Chip Center  
Chip Size:0.7x0.75mm  
Unit[um]  
Thin-Chip Thickness(-D):200±20um  
Pad Size:90x90um  
BLOCK DIAGRAM  
VSS  
VDD  
XT  
XT  
Rf  
1/ 2 1/ 2 1/ 2 1/ 2 1/ 2  
Cg  
Cd  
3 STATE  
BUFFER  
FOUT  
A
B
C
D
E
F
CONT  
2002/07/15 ( 1 / 6 )  

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