Nexperia
NEX10001UB
220 mA dual output LCD bias power supply
7. Pinning information
7.1. Pinning
UB package
SOT8054-1 (WLCSP15)
bump A1
index area
1
2
3
1
2
3
A
A
ENN OUTN CFLY2
ENP SCL PGND
B
C
B
C
SDA CFLY1
VIN
D
SW AGND REG
D
E
E PGND REG OUTP
Transparent top view
aaa-037398
Solder bump facing down
Fig. 4. Bump configuration SOT8054-1 (WLCSP15)
7.2. Pin description
Table 3. Pin description
Symbol
Bump
WLCSP15
A1
I/O
Description
ENN
I
Enable pin for VNEG rail
OUTN
CFLY2
ENP
A2
O
I/O
I
Output pin of the negative charge pump (VNEG
Negative charge pump flying capacitor pin
Enable pin for VPOS rail
)
A3
B1
SCL
B2
I/O
-
I²C interface clock signal pin
Power ground
PGND
VIN
B3
C1
I
Input voltage supply pin
SDA
C2
I/O
I/O
I/O
-
I²C interface data signal pin
Negative charge pump flying capacitor pin
Switch pin of the boost converter
Analog ground
CFLY1
SW
C3
D1
AGND
REG
D2
D3
I/O
-
Boost converter output pin
Power ground
PGND
REG
E1
E2
I/O
O
Boost converter output pin
OUTP
E3
Output pin of the LDO (VPOS)
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NEX10001UB
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2023. All rights reserved
Product data sheet
Rev. 2 — 20 December 2023
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