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NET2272

更新时间： 2024-09-24 03:46:39
品牌 Logo 应用领域
PLX 控制器
页数 文件大小 规格书
2页 257K
描述
Local Bus to USB 2.0 Hi-Speed Peripheral Controller

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NET2272 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：QFP, TQFP64,.47SQReach Compliance Code：unknown
风险等级：5.76JESD-30 代码：S-PQFP-G64
JESD-609代码：e0端子数量：64
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：TQFP64,.47SQ封装形状：SQUARE
封装形式：FLATPACK电源：2.5,3.3 V
认证状态：Not Qualified子类别：Bus Controllers
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUADBase Number Matches：1

NET2272 数据手册

 浏览型号NET2272的Datasheet PDF文件第2页 
Version 1.3 2005  
NET2272  
Features  
Local Bus to USB 2.0 Hi-Speed Peripheral Controller  
ƒ Overview  
o 8/16 bit local bus connects gluelessly  
Optimized for Power and Performance  
to most CPUs, DSPs, and DMA  
controllers  
PLX Technology’s NET2272 Local Bus to Hi-Speed USB 2.0 Peripheral Controller  
is designed for low power and high performance applications.  
o Hi-Speed USB 2.0 Peripheral Port  
o Bursting DMA support facilitates  
data transfers at 480 Mbps  
o High Bandwidth Isochronous Support  
o Low Power(186mW) requirements  
ideal for USB Bus-Powered  
Operation  
The NET2272’s low power requirements (186mW active, 8.1µW standby) make it  
ideal for bus-powered or battery-powered applications. USB bus-powered devices  
are allowed to draw a maximum 500mA (according to the USB specification) of  
operating current from the PC through the USB cable. The NET2272’s low power  
makes this requirement easy to support. Furthermore, the NET2272’s variable I/O  
voltage (1.8V to 5V) makes it easy to connect to other low power components.  
o Lowest standby power in its class  
(8.1µW)  
o Variable I/O voltage (1.8V to 5V)  
o Lead Free Packaging  
o 10x10mm 64-Pin TQFP Package  
o 6x6mm, 64-Ball BGA Package  
The NET2272 features the highest sustained data transfer speeds on USB – up to  
40Mbytes/sec. An optional Split Bus mode allows for simultaneous DMA and CPU  
access to the NET2272. In this mode, the external DMA controller is connected to  
upper 8-bits of the data bus, while the local CPU is connect to the lower 8-bits of the  
data bus. While DMA transactions are taking place, the local CPU can  
ƒ Hi-Speed USB 2.0 Interface  
o USB 2.0 Peripheral Interface  
o Hi-Speed USB with Sustained  
Bandwidth of up to 40MBytes/sec (at  
480 Mbps bursts)  
simultaneously access any endpoint buffer not involving the DMA.  
The NET2272’s Dynamic Virtual Endpoint Technology™ actualizes the maximum  
number of endpoints (30) allowed by the USB specification. This feature provides  
the flexibility for applications to route different data through different endpoints to  
improve quality of service and ease of design.  
o Backwards compatible to Full Speed  
USB connections  
o Utilize up to 30 Independent USB  
Endpoints using Dynamic Virtual  
Endpoint Technology TM  
Add Hi-Speed USB 2.0 to Your Device  
The NET2272 can be used to easily add a USB 2.0 peripheral port to any local bus  
based embedded system. The local bus interface of the NET2272 can often connect  
o Support for Bulk, Isochronous, and  
Interrupt Endpoints  
o Integrated PHY  
gluelessly because  
its interface looks  
like an 8 or 16-bit  
SRAM. Most  
CPUs and DSPs  
already have these  
memory interfaces  
integrated.  
The NET2272’s  
asynchronous bus  
makes it frequency  
independent.  
Accessing the  
NET2272’s  
registers is as  
simple as accessing  
memory.  
Figure 1: NET2272 Block Diagram  
12

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