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NE5565N PDF预览

NE5565N

更新时间： 2024-01-14 21:34:53
品牌 Logo 应用领域
恩智浦 - NXP 电子控制器
页数 文件大小 规格书
6页 75K
描述
Electronic ballast controller circuit

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中文翻译

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NE5565N 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：20
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
模拟集成电路 - 其他类型：FLUORESCENT LIGHT CONTROLLER控制模式：VOLTAGE-MODE
控制技术：PULSE WIDTH MODULATION最大输入电压：14 V
最小输入电压：9.3 V标称输入电压：12.7 V
JESD-30 代码：R-PDIP-T20长度：26.73 mm
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：
最大输出电流：0.25 A标称输出电压：7.42 V
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
认证状态：Not Qualified座面最大高度：4.2 mm
最大供电电流 (Isup)：18 mA表面贴装：NO
切换器配置：SINGLE技术：BIPOLAR
温度等级：OTHER端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

NE5565N 数据手册

 浏览型号NE5565N的Datasheet PDF文件第1页浏览型号NE5565N的Datasheet PDF文件第3页浏览型号NE5565N的Datasheet PDF文件第4页浏览型号NE5565N的Datasheet PDF文件第5页浏览型号NE5565N的Datasheet PDF文件第6页 
Philips Semiconductors  
Product specification  
Electronic ballast controller circuit  
NE5565  
AC  
LINE  
FLUORESCENT LAMPS  
HALF-BRIDGE  
SQUARE WAVE  
OSCILLATOR  
POWER FACTOR  
AC  
FILTER  
CORRECTION  
CIRCUIT  
DC  
SUPPLY  
13  
17  
12  
10  
11  
19  
DC  
18  
OV  
14  
6
15  
I
V
OUT  
OUT  
V
LAMP  
PF  
CSI GND  
CC  
P
H
PRIM  
V
R
D
C
C
DC  
C
RXCX  
5
LI  
LI2  
8
REF  
16  
T
MAX  
3
P
2
T
1
OUT  
20  
RECT  
7
4
9
R
R
5
4
R
T
R
R
1
X
R
2
R
C
C
3
C
C
2
3
T
P
DIMMING  
INPUT  
C
C
1
X
SL00526  
Figure 3. Typical Application: 2-Lamps Dimming Ballast  
above the upper trip point, both PFC and half-bridge oscillator  
Voltage Regulator  
circuits become operational. When the V falls below the lower  
CC  
The V  
output provides a regulated output voltage of 7.42V at the  
REF  
trip point of 10V, both PFC and half-bridge circuits are disabled.  
Once the half-bridge oscillator turns off, it is not allowed to turn back  
V
pin. This voltage is used as a reference as well as the power  
REF  
supply of the control logic. It is based on a trimmed band gap  
voltage reference circuit. The nominal V voltage for the control  
chip is 12.7V. The V  
on until V exceeds the upper trip point and a minimum time delay,  
CC  
CC  
set by external components at the D  
pin, has passed.  
MAX  
circuit requires a minimum of 9.3V before it  
REF  
can produce regulated output. The V  
absolute accuracy of ±3.5% over the temperature range of 0°C to  
85°C.  
output voltage has an  
REF  
Start up Ckt  
The Low Half-bridge Voltage Lock-out Circuit senses the DC output  
voltage of the PFC SMPS clrcuit. It is used to inhibit the lamp  
ignition sequence or frequency sweep of the half-bridge oscillator  
until the PFC output voltage has reached a pre-determined value.  
This value is set by external components. The PFC voltage is  
sensed by the over voltage input pin, OV. When this input exceeds  
Lamp Voltage Regulator  
Limits the maximum open circuit voltage across the lamp load during  
the pre-heat, ignition and lamp removal conditions. During steady  
state operation, the lamp voltage is governed by the arc voltage of  
the lamps, not by the control circuit. The lamp voltage comparator is  
5/7 of V  
the frequency sweep is allowed to occur, thus beginning  
REF  
the lamp ignition sequence.  
used to sense when the voltage at the V  
pin exceeds V . At  
REF  
LAMP  
the time this occurs, the lamp voltage has reached its maximum  
allowed open circuit value and the circuit responds by producing a  
rapid frequency increase which reduces the voltage at the Vlamp  
pin. The RxCx time constant sets the frequency sweep time of the  
start up circuit. The frequency sweep range has a rate of 2:1.  
The Over Voltage Protection Circuit prevents the PFC DC output  
voltage from exceeding a pre-determined value. When the voltage  
at the OV pin is greater than V  
the PFC buffer gate drive output  
REF  
OUT is turned off. This prevents any further increase in PFC DC  
P
output voltage. The over voltage circuit only protects against an  
over voltage or over shoot generated by the PFC itself. This may  
occur during turn on when the SMPS is not loaded and the circuit is  
under damped. Transient voltages from the AC line are not  
suppressed by this circuit.  
Low Supply Lock-out Protection  
Senses the DC power supply voltage at the V pin to determine  
CC  
when the PFC and half-bridge control circuits should turn on or off.  
This protection circuit uses a Schmitt trigger with a voltage reference  
to determine the upper and lower trip points of the power supply  
voltage. As the power supply voltage rises from 0V to a value just  
below the upper trip point of 11V, both the PFC and the half-bridge  
Capacitive Load Protection  
Prevents failure of the half-bridge power transistors during lamp  
removal. It does this by limiting the operation of the half-bridge  
oscillator to frequencies above the resonant frequency of an  
control circuits are held in the off state. Once the V voltage rises  
CC  
2
1996 May 21  
123456

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