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NE5565

更新时间: 2024-11-24 04:37:47
品牌 Logo 应用领域
恩智浦 - NXP 电子控制器
页数 文件大小 规格书
6页 75K
描述
Electronic ballast controller circuit

NE5565 数据手册

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Philips Semiconductors  
Product specification  
Electronic ballast controller circuit  
NE5565  
DESCRIPTION  
PIN CONFIGURATION  
The Electronic Ballast controller chip has been designed in a bipolar  
process. It is housed in a 20-lead dual-in-line plastic package. The  
control chip contains the equivalent of two (2) switched mode power  
supply control circuits. The first SMPS controller is a DC-to-DC  
converter operating in the discontinuous current conduction mode.  
It is used as a PFC in the ballast system to provide a DC voltage  
step-up function, good AC power factor, low AC current harmonic  
distortion, and circuit protection against some types of AC voltage  
transients. The PFC uses pulse width modulation to control the  
power transfer with an external MOS power transistor. The second  
SMPS circuit is a half-bridge oscillator circuit. It converts the DC  
output voltage of the PFC into a high frequency AC voltage for  
operating lamps. Power transfer in this circuit is controlled by  
changing the switch frequency. The half-bridge controller circuit is  
capable of driving two external high voltage MOS power transistors  
and it has circuits to regulate the lamp current, limit the peak lamp  
voltage, and protect the power switches during fault conditions. This  
electronic ballast controller circuit has the capability of being used in  
a dimming application.  
N Package  
1
20  
DC  
C
T
OUT  
2
19 DC  
18 OV  
C
P
3
4
D
MAX  
17  
16  
PF  
V
R
T
5
RXCX  
REF  
6
15 I  
V
PRIM  
LAMP  
7
14  
C
OUT  
RECT  
LI2  
H
8
13  
12  
V
CC  
9
LI  
OUT  
P
10  
11 GND  
CSI  
SL00524  
Figure 1. Pin Configuration  
Selectable variable frequency modes  
Programmable pre-hit and ignition  
Lamp over-voltage protection  
FEATURES:  
Complete PFC correction and dimming ballast control on one IC  
PFC over-voltage protection for preventing over-shooting due to  
Low line current distortion PFC  
load removal  
ORDERING INFORMATION  
DESCRIPTION  
TEMPERATURE RANGE  
ORDER CODE  
DWG #  
0 to +85°C  
20-Pin Plastic Dual-In-Line Package (DIP)  
NE5565N  
SOT146-1  
BLOCK DIAGRAM  
RXCX  
R
T
V
LAMP  
6
5
4
V
CC  
C
7
8
RECT  
LI2  
LI  
9
D
3
MAX  
C
C
2
1
P
T
CSI  
10  
GND  
11  
12  
OUT  
P
20  
DC  
OUT  
13  
V
14  
OUT  
15  
16  
V
REF  
17 18  
PF OV  
19  
DC  
CC  
I
SL00525  
H
PRIM  
Figure 2. Block Diagram  
1
1996 May 21  
853-1835 16843  

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