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NCP6153MNTWG PDF预览

NCP6153MNTWG

更新时间: 2024-11-23 12:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 控制器
页数 文件大小 规格书
29页 394K
描述
Dual Output 3/4 Phase 1/0 Phase Controller with Single SVID Interface for Desktop and Notebook CPU Applications

NCP6153MNTWG 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.52模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:S-XQCC-N52JESD-609代码:e3
长度:6 mm湿度敏感等级:1
功能数量:1端子数量:52
最高工作温度:100 °C最低工作温度:-10 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度:1 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:OTHER
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.4 mm端子位置:QUAD
宽度:6 mmBase Number Matches:1

NCP6153MNTWG 数据手册

 浏览型号NCP6153MNTWG的Datasheet PDF文件第2页浏览型号NCP6153MNTWG的Datasheet PDF文件第3页浏览型号NCP6153MNTWG的Datasheet PDF文件第4页浏览型号NCP6153MNTWG的Datasheet PDF文件第5页浏览型号NCP6153MNTWG的Datasheet PDF文件第6页浏览型号NCP6153MNTWG的Datasheet PDF文件第7页 
NCP6153  
Dual Output 3/4 Phase +1/0  
Phase Controller with  
Single SVID Interface for  
Desktop and Notebook CPU  
Applications  
http://onsemi.com  
MARKING  
The NCP6153 dual output four plus one phase buck solution is  
optimized for Intel VR12 compatible CPUs. The controller combines  
true differential voltage sensing, differential inductor DCR current  
sensing, input voltage feedforward, and adaptive voltage positioning  
to provide accurately regulated power for both Desktop and Notebook  
applications. The control system is based on DualEdge pulsewidth  
modulation (PWM) combined with DCR current sensing providing  
the fastest initial response to dynamic load events and reduced system  
cost. It also sheds to single phase during light load operation and can  
auto frequency scale in light load while maintaining excellent  
transient performance.  
DIAGRAM  
NCP6153  
AWLYYWWG  
1
52  
QFN52  
CASE 485BE  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
Dual high performance operational error amplifiers are provided to  
simplify compensation of the system. Patented Dynamic Reference  
Injection further simplifies loop compensation by eliminating the need  
to compromise between closedloop transient response and Dynamic  
VID performance. Patented Total Current Summing provides highly  
accurate current monitoring for droop and digital current monitoring.  
WW = Work Week  
G
= PbFree Package  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 28 of this data sheet.  
Features  
Meets Intel VR12/IMVP7 Specifications  
Current Mode Dual Edge Modulation for Fastest Initial  
Switching Frequency Range of 200 kHz – 1.0 MHz  
Startup into PreCharged Loads While Avoiding False  
OVP  
Response to Transient Loading  
Dual High Performance Operational Error Amplifier  
One Digital Soft Start Ramp for Both Rails  
Dynamic Reference Injection  
Accurate Total Summing Current Amplifier  
DAC with Droop Feedforward Injection  
Dual High Impedance Differential Voltage and Total  
Current Sense Amplifiers  
PhasetoPhase Dynamic Current Balancing  
“Lossless” DCR Current Sensing for Current Balancing  
Summed Thermally Compensated Inductor Current  
Sensing for Droop  
True Differential Current Balancing Sense Amplifiers  
for Each Phase  
Power Saving Phase Shedding  
Vin Feed Forward Ramp Slope  
Pin Programming for Internal SVID Parameters  
Over Voltage Protection (OVP) and Under Voltage  
Protection (UVP)  
Over Current Protection (OCP)  
Dual Power Good Output with Internal Delays  
These Devices are PbFree and are RoHS Compliant  
Applications  
Desktop & Notebook Processors  
Server Processors and Memory Power  
Adaptive Voltage Positioning (AVP)  
©
Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
October, 2012 Rev. 1  
NCP6153/D  

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