Datasheet > NCP6121S52MNR2G

NCP6121S52MNR2G

更新时间： 2024-11-22 12:29:19

品牌	Logo	应用领域
安森美 - ONSEMI		控制器
页数	文件大小	规格书
28页	315K
描述
Dual Output 3 Phase 1/0 Phase Controller with Single SVID Interface for Desktop and Notebook CPU Applications

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NCP6121S52MNR2G 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	VQCCN,	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	1.54	模拟集成电路 - 其他类型：	ANALOG CIRCUIT
JESD-30 代码：	S-XQCC-N52	JESD-609代码：	e3
长度：	6 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	52
最高工作温度：	100 °C	最低工作温度：	-10 °C
封装主体材料：	UNSPECIFIED	封装代码：	VQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, VERY THIN PROFILE
座面最大高度：	1 mm	最大供电电压 (Vsup)：	5.25 V
最小供电电压 (Vsup)：	4.75 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	温度等级：	OTHER
端子面层：	Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.4 mm	端子位置：	QUAD
宽度：	6 mm	Base Number Matches：	1

NCP6121S52MNR2G 数据手册

NCP6121

Dual Output 3 Phase +1/0

Phase Controller with

Single SVID Interface for

Desktop and Notebook CPU

Applications

http://onsemi.com

MARKING

The NCP6121 dual output three plus one phase buck solution is

optimized for Intel VR12 compatible CPUs. The controller combines

true differential voltage sensing, differential inductor DCR current

sensing, input voltage feed−forward, and adaptive voltage positioning

to provide accurately regulated power for Desktop applications. The

control system is based on Dual−Edge pulse−width modulation

(PWM) combined with DCR current sensing providing the fastest

initial response to dynamic load events and reduced system cost. It

also sheds to single phase during light load operation and can auto

frequency scale in light load while maintaining excellent transient

performance.

DIAGRAM

NCP6121

AWLYYWWG

QFN−52

CASE 485BE

= Assembly Location

WL = Wafer Lot

YY = Year

Dual high performance operational error amplifiers are provided to

simplify compensation of the system. Patented Dynamic Reference

Injection further simplifies loop compensation by eliminating the need

to compromise between closed−loop transient response and Dynamic

VID performance. Patented Total Current Summing provides highly

accurate current monitoring for droop and digital current monitoring.

WW = Work Week

= Pb−Free Package

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 27 of this data sheet.

Features

• Meets Intel VR12 and IMVP7 Specifications

• Current Mode Dual Edge Modulation for Fastest Initial Response to

Transient Loading

• Dual High Performance Operational Error Amplifier

• One Digital Soft Start Ramp for Both Rails

• Dynamic Reference Injection

• Accurate Total Summing Current Amplifier

• DAC with Droop Feed−forward Injection

• Dual High Impedance Differential Voltage and Total

Current Sense Amplifiers

• Switching Frequency Range of 200 kHz – 1.0 MHz

• Startup into Pre−Charged Loads While Avoiding False

OVP

• Power Saving Phase Shedding

• Vin Feed Forward Ramp Slope

• Pin Programming for Internal SVID parameters

• Over Voltage Protection (OVP) and Under Voltage

Protection (UVP)

• Phase−to−Phase Dynamic Current Balancing

• “Lossless” DCR Current Sensing for Current Balancing

• Over Current Protection (OCP)

• Dual Power Good Output with Internal Delays

• Summed Thermally Compensated Inductor Current

• These Devices are Pb−Free and are RoHS Compliant

Sensing for Droop

• True Differential Current Balancing Sense Amplifiers

for Each Phase

• Adaptive Voltage Positioning (AVP)

Applications

• Desktop and Notebook Processors

Publication Order Number:

January, 2013 − Rev. 2

NCP6121/D

12 3 4 5 6 7...28

中文翻译

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