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NCP500

更新时间： 2024-11-22 22:50:55
品牌 Logo 应用领域
安森美 - ONSEMI 稳压器
页数 文件大小 规格书
20页 125K
描述
150 mA CMOS Low Noise Low-Dropout Voltage Regulator

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NCP500  
150 mA CMOS Low Noise  
Low−Dropout Voltage  
Regulator  
The NCP500 series of fixed output low dropout linear regulators are  
designed for portable battery powered applications which require low  
noise operation, fast enable response time, and low dropout. The  
device achieves its low noise performance without the need of an  
external noise bypass capacitor. Each device contains a voltage  
reference unit, an error amplifier, a PMOS power transistor, and  
resistors for setting output voltage, and current limit and temperature  
limit protection circuits.  
http://onsemi.com  
TSOP−5  
SN SUFFIX  
CASE 483  
5
1
The NCP500 has been designed to be used with low cost ceramic  
capacitors and requires a minimum output capacitor of 1.0 mF.  
QFN 2x2  
SQL SUFFIX  
CASE 488  
Features  
1
• Ultra−Low Dropout Voltage of 170 mV at 150 mA  
• Fast Enable Turn−On Time of 20 msec  
• Wide Operating Voltage Range of 1.8 V to 6.0 V  
• Excellent Line and Load Regulation  
• High Accuracy Output Voltage of 2.5%  
• Enable Can Be Driven Directly by 1.0 V Logic  
6
PIN CONNECTIONS AND  
MARKING DIAGRAMS  
TSOP−5  
• Typical RMS Noise Voltage 50 mV with No Bypass Capacitor  
(BW = 10 Hz to 100 kHz)  
1
2
V
5
4
V
in  
out  
• Very Small QFN 2x2 Package  
• Pb−Free Package May be Available.* The G−Suffix Denotes a  
Pb−Free Lead Finish  
GND  
Enable  
3
N/C  
Typical Applications  
(Top View)  
• Noise Sensitive Circuits − VCO’s, RF Stages, etc.  
• SMPS Post−Regulation  
QFN 2x2  
• Hand−Held Instrumentation  
• Camcorders and Cameras  
6
5
4
Enable  
GND  
N/C  
1
2
3
xxM  
GND  
V
in  
V
out  
(Top View)  
V
in  
V
out  
1 (3)  
5 (4)  
xxx, xx = Version  
Y
W
M
= Year  
= Work Week  
= Date Code  
Driver w/  
Current  
Limit  
Thermal  
Shutdown  
Enable  
3 (1)  
ORDERING INFORMATION  
ON  
See detailed ordering and shipping information in the package  
dimensions section on page 17 of this data sheet.  
OFF  
2 (2, 5)  
GND  
*For additional information on our Pb−Free strategy  
and soldering details, please download the ON  
Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
NOTE: Pin numbers in parenthesis indicate QFN package.  
Figure 1. Simplified Block Diagram  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
January, 2004 − Rev. 16  
NCP500/D  
1234567...20

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