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NCC230CE-0.0625 PDF预览

NCC230CE-0.0625

更新时间: 2024-12-01 19:00:15
品牌 Logo 应用领域
美台 - DIODES 石英晶振
页数 文件大小 规格书
2页 109K
描述
XO, Clock, 0.0625MHz Min, 4MHz Max, 0.0625MHz Nom, Hybrid,

NCC230CE-0.0625 数据手册

 浏览型号NCC230CE-0.0625的Datasheet PDF文件第2页 
SaRonix  
Crystal Clock Oscillator  
5V, CMOS, TTL, Low Current  
NCC Series  
Technical Data  
Frequency Range:  
62.5 kHz to 24 MHz ( ½ size - 250 kHz to 24 MHz )  
25, 50 or 100 ꢀꢀꢁ over all conꢂitionsꢃ caliꢄration  
Frequency Stability:  
tolerance, oꢀerating teꢁꢀerature, inꢀut voltage change,  
loaꢂ change, aging, shock anꢂ viꢄration.  
Temperature Range:  
Oꢀeratingꢃ  
Storageꢃ  
0°C to +70°C  
-55°C to +125°C  
Supply Voltage:  
Recoꢁꢁenꢂeꢂ Oꢀeratingꢃ  
5V 10ꢅ  
Supply Current:  
(See Inꢀut Current vs. Frequency Graꢀh, ꢀage 2)  
Output Drive:  
CMOS  
ACTUAL SIZE  
Syꢁꢁetry  
Rise & Fall Tiꢁesꢃ  
Logic 0ꢃ  
see ꢀart nuꢁꢄering guiꢂe  
12ns ꢁax, 20ꢅ to 80ꢅ V  
DD  
10ꢅ V  
90ꢅ V  
ꢁax  
ꢁin  
DD  
DD  
Description  
Logic 1ꢃ  
A crystal controlleꢂ, low current hyꢄriꢂ  
oscillator ꢀroviꢂing ꢀrecise rise anꢂ fall  
tiꢁes to ꢂrive CMOS anꢂ NMOS ꢁicro-  
ꢀrocessors.CoꢁꢀatiꢄlewithothCMOS  
anꢂ TTL. Can ꢂrive uꢀ to 2 LSTTL  
loaꢂs. Device is ꢀackageꢂ in 14-ꢀin or  
an 8-ꢀin DIP coꢁꢀatiꢄle full size or half  
size, resistance welꢂeꢂ, all ꢁetal case.  
Pin 7 (ꢀin 4 for ½ size) is grounꢂeꢂ to the  
case to reꢂuce RFI.  
Outꢀut Loaꢂꢃ  
2 CMOS  
TTL  
Syꢁꢁetry  
Rise & Fall Tiꢁesꢃ  
Logic 0ꢃ  
see ꢀart nuꢁꢄering guiꢂe  
12ns ꢁax, 0.5V to 2.5V  
0.5V ꢁax  
2.5V ꢁin (V  
2 LSTTL  
Logic 1ꢃ  
Outꢀut Loaꢂꢃ  
-0.6 tyꢀ)  
CC  
Mechanical:  
Shockꢃ  
Solꢂeraꢄilityꢃ  
Terꢁinal Strengthꢃ  
Viꢄrationꢃ  
Solvent Resistanceꢃ  
MIL-STD-883, Methoꢂ 2002, Conꢂition B  
MIL-STD-883, Methoꢂ 2003  
MIL-STD-883, Methoꢂ 2004, Conꢂition B2  
MIL-STD-883, Methoꢂ 2007, Conꢂition A  
MIL-STD-202, Methoꢂ 215  
Applications & Features  
Resistance to Solꢂering Heatꢃ  
MIL-STD-202, Methoꢂ 210, Conꢂition A, B or C  
Low ꢀower  
Environmental:  
CMOS anꢂ TTL coꢁꢀatiꢄle outꢀut  
Enaꢄle/ꢂisaꢄle feature availaꢄle  
Grounꢂeꢂ, all ꢁetal full size anꢂ half  
size case  
Gross Leak Testꢃ  
Fine Leak Testꢃ  
Therꢁal Shockꢃ  
MIL-STD-883, Methoꢂ 1014, Conꢂition C  
MIL-STD-883, Methoꢂ 1014, Conꢂition A2  
MIL-STD-883, Methoꢂ 1011, Conꢂition A  
MIL-STD-883, Methoꢂ 1004  
Moisture Resistanceꢃ  
Output Waveform  
Part Numbering Guide  
CMOS  
TTL  
T
T
T
T
f
r
f
r
NCC 0  
6 0 C E - 4.0000  
1
Level  
VDD  
Series  
Frequency (MHz)  
80% VDD  
50% VDD  
20% VDD  
Symmetry & Temperature Range  
0 = 40/60% max, 0 to 70°C  
2 = 40/60% max, -40 to 85°C  
Blank = No Enable/Disable  
E = Enable/ Disable  
2.5 VDC  
1.5 VDC  
0.5 VDC  
Stability Tolerance  
A = 25 ꢀꢀm, 0 to +70°C onlꢁ  
B = 50 ꢀꢀm  
0
Level  
GND  
4 = 45/55% max, -40 to 85°C, TTL to 7.1590MHz  
6 = 45/55% max, 0 to 70°C, TTL to 7.1590MHz  
A = 45/55% max, 0 to 70°C, CMOS to 7.1590MHz  
C = 45/55% max, -40 to 85°C, CMOS to 7.1590MHz  
SYMMETRY  
SYMMETRY  
C = 100 ꢀꢀm  
Package Type  
0 = Full Size  
9 = Half Size  
Frequency Range  
3 = 62.5 kHz to 4 MHz, Full Size  
250 kHz to 4 MHz, Half Size  
6 = 4+ MHz to 24 MHz  
DS-133  
REV C  
SaRonix  
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894  

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