Datasheet > N02L083WC2AN2

N02L083WC2AN2

更新时间： 2022-12-16 18:17:28

品牌	Logo	应用领域
NANOAMP		静态存储器
页数	文件大小	规格书
10页	223K
描述
2Mb Ultra-Low Power Asynchronous CMOS SRAM 256K x 8 bit

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N02L083WC2AN2 数据手册

NanoAmp Solutions, Inc.

Power Savings with Page Mode Operation (WE = V )

N02L083WC2A

Page Address (A4 - A17)

Word Address (A0 - A3)

Open page

...

Word 16

Word 1

Word 2

CE1

CE2

Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal

organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power

saving feature.

The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open

and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant

bits and addressing the 16 words within the open page, power is reduced to the page mode value which is

considerably lower than standard operating currents for low power SRAMs.

(DOC# 14-02-015 REV E ECN# 01-0998)

The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.

1 2 345 6 7...10

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型号	品牌	描述	获取价格	数据表
N02L083WC2AN2-55I	NANOAMP	Standard SRAM, 256KX8, 55ns, CMOS, PDSO32	获取价格
N02L083WC2AN-70I	NANOAMP	Standard SRAM, 256KX8, 70ns, CMOS, PDSO32	获取价格
N02L083WC2AT	NANOAMP	2Mb Ultra-Low Power Asynchronous CMOS SRAM 256K x 8 bit	获取价格
N02L083WC2AT2	NANOAMP	2Mb Ultra-Low Power Asynchronous CMOS SRAM 256K x 8 bit	获取价格
N02L083WC2AT2-70I	NANOAMP	Standard SRAM, 256KX8, 70ns, CMOS, PDSO32	获取价格
N02L083WC2AT-55I	NANOAMP	Standard SRAM, 256KX8, 55ns, CMOS, PDSO32	获取价格