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MXED101 PDF预览

MXED101

更新时间: 2024-11-24 10:39:23
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14页 423K
描述
30V, 192-Channel OLED Display Driver

MXED101 数据手册

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MXED101  
30V, 192-Channel OLED Display Driver  
General Description  
Features:  
The MXED101 is a 6-bit, 192-output column driver IC  
designed to drive passive matrix full-color (RGB) and mono-  
chrome Organic Light Emitting Diode (OLED) displays. Each  
of the 192 current outputs is designed to act as a precision  
high impedance current source. The MXED101 current source  
output supply range is from 15 to 30V. The outputs are  
arranged in a row on one side of the die with a pitch of 92  
microns, which facilitates easy interface with the display.  
CMOS technology  
192 Precision outputs  
Programmable output current control  
Optimized adjacent channel and chip-to-chip output  
matching  
3.3V or 5V logic supply voltage  
55 MHz clock frequency  
Cascadable  
30V output driver supply voltage  
Bi-directional data transfer  
Supports Grayscale, Binary, and Standby modes  
Low power consumption  
Package type: TCP (MXED101TP) and Die  
(MXED101DI)  
The MXED101 consists of an Input Register, Transfer Latch,  
Comparator, Bi-directional Shift Register, Counter, and 192  
Programmable Current Outputs. The device has three 6-bit  
input data buses, DA(5-0), DB(5-0), and DC(5-0), to accept  
RGB or monochrome data. This data can be clocked through  
the device at a maximum speed of 55 MHz with a 5V logic sup-  
ply (40 MHz with a 3.3V logic supply).  
The outputs of the MXED101 are arranged in three program-  
mable interdigitized banks (A, B, and C) of 64 outputs each, a  
bank for each color of the RGB data (programming the output  
current is described in the Functional Description section). Bank  
A controls outputs 1, 4, 7, …, 190; Bank B controls outputs 2, 5,  
8, …, 191; and Bank C controls outputs 3, 6, 9, …, 192.  
Ordering Information  
Part #  
Description  
MXED101  
30V, 192-Channel OLED  
The MXED101 employs three methods to adjust display bright-  
ness: a global gain voltage, a 3-bit digital control for each color,  
and an external 10.8 KW resistor. In addition to these methods,  
the relative brightness of each output can be controlled by on-  
chip pulse width modulation. A standby signal (STBY) is provid-  
ed to place the display in low power standby mode whenever it  
is necessary.  
Display Driver  
Block Diagram  
SWC  
DA(5-0)  
DB(5-0)  
Q1  
Q2  
Q3  
Program-  
mable  
DC(5-0)  
192 X 6  
192 x 6  
Transfer  
Latch  
192-  
192 x 6  
Input  
CLKSH  
Comparator  
channel  
Output  
Terminal  
Register  
Q192  
64 x 1  
Bi-  
DIRTKN  
Direction  
Shift  
Register  
6-Bit  
Up  
Counter  
RTKNB  
LTKNB  
LE  
CLKEX  
STBY  
Output  
Mapping/  
Current  
SDM(1-0)  
GG  
GA(2-0)  
Programming  
GB(2-0)  
GC(2-0)  
RG  
DS-MXED101-R9  
1
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