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MX29F200BMC-70 PDF预览

MX29F200BMC-70

更新时间: 2024-11-22 22:27:47
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旺宏电子 - Macronix /
页数 文件大小 规格书
46页 720K
描述
2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY

MX29F200BMC-70 数据手册

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MX29F200T/B  
2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY  
FEATURES  
• 5.0V±10% for read, erase and write operation  
• 131072x16/262144x8 switchable  
• Fast access time: 55/70/90/120ns  
• Low power consumption  
- Superior inadvertent write protection  
• Sector protection  
- Hardware method to disable any combination of  
sectors from program or erase operations  
- Sector protect/unprotect for 5V only system or 5V/  
12V system  
- 40mA maximum active current@5MHz  
- 1uA typical standby current  
• Command register architecture  
- Byte/Word Programming (7us/12us typical)  
- Erase (16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and  
64K-Byte x3)  
• 100,000minimumerase/programcycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Boot Code Sector Architecture  
- T = Top Boot Sector  
• Auto Erase (chip) and Auto Program  
- Automatically erase any combination of sectors or  
the whole chip with Erase Suspend capability.  
- Automatically program and verify data at specified  
address  
- B = Bottom Boot Sector  
• Low VCC write inhibit is equal to or less than 3.2V  
• Package type:  
- 44-pin SOP  
- 48-pin TSOP  
• Erase suspend/ Erase Resume  
- Suspends an erase operation to read data from, or  
programdatatoasectorthatisnotbeingerased,then  
resume the erase operation.  
• Status Reply  
- Data polling & Toggle bit for detection of program  
and erase cycle completion.  
• Ready/Busy pin(RY/BY)  
- Provides a hardware method or detecting program  
or erase cycle completion  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
• Hardware RESET pin  
- Resets internal state mechine to the read mode  
• 20 years data retention  
GENERAL DESCRIPTION  
TTL level control inputs and fixed power supply levels  
duringeraseandprogramming,whilemaintainingmaxi-  
mum EPROM compatibility.  
The MX29F200T/B is a 2-mega bit, single 5 Volt Flash  
memoryorganizedas1Mwordx16or2Mbytex8MXIC's  
Flash memories offer the most cost-effective and reli-  
able read/write non-volatile random access memory.  
The MX29F200T/B is packaged in 44-pin SOP and 48-  
pin TSOP. It is designed to be reprogrammed and  
erasedin-systemorin-standardEPROMprogrammers.  
MXICFlashtechnologyreliablystoresmemorycontents  
evenafter100,000eraseandprogramcycles. TheMXIC  
cell is designed to optimize the erase and programming  
mechanisms. In addition, the combination of advanced  
tunneloxideprocessingandlowinternalelectricfieldsfor  
erase and programming operations produces reliable  
cycling. The MX29F200T/B uses a 5.0V ± 10% VCC  
supply to perform the High Reliability Erase and auto  
Program/Erasealgorithms.  
The standard MX29F200T/B offers access time as fast  
as55ns, allowingoperationofhigh-speedmicroproces-  
sorswithoutwaitstates. Toeliminatebuscontention,the  
MX29F200T/Bhasseparatechipenable(CE)andoutput  
enable (OE ) controls.  
The highest degree of latch-up protection is achieved  
with MXIC's proprietary non-epi process. Latch-up  
protection is proved for stresses up to 100 milliamps on  
address and data pin from -1V to VCC + 1V.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29F200T/Busesacommandregistertomanagethis  
functionality. The command register allows for 100%  
P/N:PM0549  
REV. 1.3, DEC. 24, 2001  
1

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