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MUN2134T1G PDF预览

MUN2134T1G

更新时间: 2024-01-13 02:51:04
品牌 Logo 应用领域
安森美 - ONSEMI 晶体小信号双极晶体管开关光电二极管
页数 文件大小 规格书
13页 112K
描述
Bias Resistor Transistors

MUN2134T1G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SC-59
包装说明:LEAD FREE, PLASTIC, CASE 318D-04, SC-59, 3 PIN针数:3
Reach Compliance Code:unknown风险等级:5.39
其他特性:BUILT-IN BIAS RESISTOR RATIO IS 2.14最大集电极电流 (IC):0.1 A
集电极-发射极最大电压:50 V配置:SINGLE WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE):80JESD-30 代码:R-PDSO-G3
JESD-609代码:e3元件数量:1
端子数量:3封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260极性/信道类型:PNP
认证状态:COMMERCIAL表面贴装:YES
端子面层:MATTE TIN端子形式:GULL WING
端子位置:DUAL处于峰值回流温度下的最长时间:40
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

MUN2134T1G 数据手册

 浏览型号MUN2134T1G的Datasheet PDF文件第2页浏览型号MUN2134T1G的Datasheet PDF文件第3页浏览型号MUN2134T1G的Datasheet PDF文件第4页浏览型号MUN2134T1G的Datasheet PDF文件第5页浏览型号MUN2134T1G的Datasheet PDF文件第6页浏览型号MUN2134T1G的Datasheet PDF文件第7页 
MUN2111T1 Series  
Preferred Devices  
Bias Resistor Transistors  
PNP Silicon Surface Mount Transistors  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The  
Bias Resistor Transistor (BRT) contains a single transistor with a  
monolithic bias network consisting of two resistors; a series base  
resistor and a base−emitter resistor. The BRT eliminates these  
individual components by integrating them into a single device. The  
use of a BRT can reduce both system cost and board space. The device  
is housed in the SC−59 package which is designed for low power  
surface mount applications.  
http://onsemi.com  
PIN 3  
COLLECTOR  
(OUTPUT)  
R1  
R2  
PIN 2  
BASE  
(INPUT)  
Features  
PIN 1  
EMITTER  
(GROUND)  
Simplifies Circuit Design  
Reduces Board Space  
Reduces Component Count  
Moisture Sensitivity Level: 1  
3
ESD Rating − Human Body Model: Class 1  
2
− Machine Model: Class B  
1
The SC−59 Package Can be Soldered Using Wave or Reflow  
The Modified Gull−Winged Leads Absorb Thermal Stress During  
Soldering Eliminating the Possibility of Damage to the Die  
Pb−Free Packages are Available  
SC−59  
CASE 318D  
PLASTIC  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
MARKING DIAGRAM  
Rating  
Collector − Base Voltage  
Collector − Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
V
V
CBO  
CEO  
50  
Vdc  
6x M G  
G
I
100  
mAdc  
C
1
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
6x  
M
G
= Specific Device Code  
= Date Code*  
= Pb−Free Package  
Total Device Dissipation  
P
230 (Note 1)  
338 (Note 2)  
1.8 (Note 1)  
2.7 (Note 2)  
mW  
D
T = 25°C  
A
Derate above 25°C  
°C/W  
°C/W  
°C/W  
°C  
(Note: Microdot may be in either location)  
*Date Code orientation may vary depending  
upon manufacturing location.  
Thermal Resistance,  
Junction−to−Ambient  
R
q
540 (Note 1)  
370 (Note 2)  
JA  
Thermal Resistance,  
Junction−to−Lead  
R
q
264 (Note 1)  
287 (Note 2)  
JL  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 2 of  
this data sheet.  
Junction and Storage Temperature  
Range  
T , T  
J
55 to +150  
stg  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. FR−4 @ Minimum Pad.  
DEVICE MARKING INFORMATION  
See device marking table on page 2 of this data sheet.  
Preferred devices are recommended choices for future use  
and best overall value.  
2. FR−4 @ 1.0 x 1.0 inch Pad.  
©
Semiconductor Components Industries, LLC, 2006  
Publication Order Number:  
1
September, 2006 − Rev. 17  
MUN2111T1/D  
 

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