®
MU9C8248
FDDI SRT Interface
MUSICI
S E M I C O N D U C T O R S
PRELIMINARY DATA SHEET
DISTINCTIVE CHARACTERISTICS
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High-speed FDDI Source Routing and Transparent
Bridging address filter supports up to sixteen ports
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Automatic selection of Source Routing or Transparent
filtering routines based on Transceiver output data
Glue-free operation with the MUSIC MU9C1480 LANCAM
and AMD, National Semiconductor, and Motorola FDDI
chip sets
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Supplies proper XDAMAT, XSAMAT, SRMAT, ABORT,
and CIP signals to the FDDI chip sets
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Selectable filtering options for each frame type
Checks validity of Routing Information Field
TTL-compatible interfaces
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Configurable for both Motorola and Intel processor
addressing modes
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Complies with the ISO 9314 standard for FDDI
64-entry Instruction Buffer holds up to six down-
loadable filtering and purging routines
Manufactured in CMOS technology
Available in 100-pin PQFP package
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64-entry Data Buffer or internal FIFO
GENERAL DESCRIPTION
The MU9C8248 is a Source Routing Transparent (SRT) Interface to the The MU9C8248 can choose to copy or reject a frame depending on the
MUSIC Semiconductors LANCAM for use in FDDI LAN Bridges and frame's DA, RIF, and/or the frame type (MAC, LLC, or Reserved), and
Brouters. This interface operates in accordance with ISO standards can perform multiple validity checks within the Routing Information
while supporting address filtering rates up to 500,000 frames/sec for Field (RIF), including general checks on every Routing Control Field
minimum-length frames.
(RCF) as well as multiple frame related checks.
The MU9C8248 has five interfaces to provide “glue-free” address The internal RAM can store up to 64 instructions at initialization for the
filtering. The Transceiver interface monitors receive data between the LANCAM to execute matching, learning, aging, and purging operations.
Physical Layer device and the MAC and determines whether to filter Up to six routines can be stored here and started by the network or the
according to Source Routing or Transparent Bridging standards. The Node Processor. Internal arbitration prioritizes execution of instructions
MAC interface supplies signals to instruct the FDDI chip set to reject or by the LANCAM. A second internal RAM, which contains 64 16-bit
copy
a frame. The LANCAM interface controls the companion words, is used for data buffering operations or as an internal FIFO.
LANCAM(s) for Transparent filtering. The Host Processor interface
allows direct initialization of the MU9C8248, and downloading of the With sixteen Ring-Bridge-Ring number combinations stored internally,
filtering and purging routines. The FIFO interface outputs new the MU9C8248 is very well suited to operate as an address filter in
addresses received from the FDDI network.
multi-port Source Routing Bridge/Brouter environments.
BLOCK DIAGRAM
8
MAC
INTERFACE
TRANSCEIVER
INTERFACE
DCLK
STRIP
/INT
STOP STRIP
6
A5-A0
16
DQ15-DQ0
TRANSPARENT
BRIDGING BLOCK
16
D15-D0
ALE, SRNW
/CS
SOURCE ROUTING
BLOCK
/E
/W
/RS, /LDS
/WS, /UDS
/HBRDY
/HBEN
INSTRUCTION
BUFFER
/CM
/EC
/MI
/FI
/HBDIR
/RESET
ARBITER
8
/FULL, /EMPTY
MUSIC is a trademark of MUSIC Semiconductors. LANCAM, the MUSIC logo, and the phrase “MUSIC Semiconductors” are registered trademarks of
MUSIC Semiconductors. AMD is a registered trademark of Advanced Micro Devices, Inc. National Semiconductor is a registered trademark of National
Semiconductor Corporation. Motorola is a registered trademark of Motorola, Inc. Intel is a registered trademark of Intel Corporation.
15 April 1997 Rev. 2.5 Web