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MTP8N50EWC

更新时间: 2024-11-28 13:11:55
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摩托罗拉 - MOTOROLA 晶体晶体管功率场效应晶体管开关脉冲局域网
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MTP8N50EWC 数据手册

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Order this document  
by MTP8N50E/D  
SEMICONDUCTOR TECHNICAL DATA  
N–Channel Enhancement–Mode Silicon Gate  
TMOS POWER FET  
This high voltage MOSFET uses an advanced termination  
scheme to provide enhanced voltage–blocking capability without  
degrading performance over time. In addition, this advanced TMOS  
E–FET is designed to withstand high energy in the avalanche and  
commutation modes. This new energy efficient design also offers a  
drain–to–source diode with a fast recovery time. Designed for low  
voltage, high speed switching applications in power supplies,  
converters, PWM motor controls, these devices are particularly well  
suited for bridge circuits where diode speed and commutating safe  
operating areas are critical and offer additional safety margin  
against unexpected voltage transients.  
8.0 AMPERES  
500 VOLTS  
R
= 0.8 OHM  
DS(on)  
D
Robust High Voltage Termination  
Avalanche Energy Specified  
Source–to–Drain Diode Recovery Time Comparable  
to a Discrete Fast Recovery Diode  
G
Diode is Characterized for Use in Bridge Circuits  
S
I
and V  
Specified at Elevated Temperature  
DSS  
DS(on)  
CASE 221A–06, Style 5  
TO-220AB  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
500  
Unit  
Vdc  
Vdc  
Drain–to–Source Voltage  
V
DSS  
Drain–to–Gate Voltage (R  
GS  
= 1.0 M  
)
V
DGR  
500  
Gate–to–Source Voltage – Continuous  
Gate–to–Source Voltage – Non–repetitive (tp 10 ms)  
V
±20  
±40  
Vdc  
Vpk  
GS  
V
GSM  
Drain Current — Continuous @ T = 25°C  
I
I
8.0  
5.0  
32  
Adc  
Apk  
C
D
D
Drain Current — Continuous @ T = 100°C  
C
I
Drain Current — Single Pulse (tp 10 s)  
DM  
Total Power Dissipation @ T = 25°C  
Derate above 25°C  
P
D
125  
1.0  
Watts  
W/°C  
C
Operating and Storage Temperature Range  
T , T  
stg  
55 to 150  
510  
°C  
J
Single Pulse Drain–to–Source Avalanche Energy – STARTING T = 25°C  
E
AS  
mJ  
J
(V  
DD  
= 25 Vdc, V  
= 10 Vdc, PEAK I = 8.0 Apk, L = 16 mH, R = 25  
)
GS  
L
G
Thermal Resistance  
– Junction–to–Case  
– Junction–to–Ambient  
R
R
1.0  
62.5  
JC  
JA  
°C/W  
°C  
Maximum Lead Temperature for Soldering Purposes, 1/8from Case for 5 sec.  
T
L
260  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
REV 2  
Motorola, Inc. 1996  

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