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MTP12N10ELWC PDF预览

MTP12N10ELWC

更新时间： 2024-09-28 13:11:55
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 晶体晶体管功率场效应晶体管开关脉冲局域网
页数 文件大小 规格书
6页 242K
描述
12A, 100V, 0.16ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB

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MTP12N10ELWC 技术参数

生命周期：Obsolete包装说明：FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code：unknownECCN代码：EAR99
风险等级：5.7其他特性：LOGIC LEVEL COMPATIBLE
外壳连接：DRAIN配置：SINGLE
最小漏源击穿电压：100 V最大漏极电流 (ID)：12 A
最大漏源导通电阻：0.16 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：TO-220ABJESD-30 代码：R-PSFM-T3
元件数量：1端子数量：3
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：FLANGE MOUNT
极性/信道类型：N-CHANNEL功耗环境最大值：75 W
认证状态：Not Qualified表面贴装：NO
端子形式：THROUGH-HOLE端子位置：SINGLE
晶体管元件材料：SILICONBase Number Matches：1

MTP12N10ELWC 数据手册

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Order this document  
by MTP12N10E/D  
SEMICONDUCTOR TECHNICAL DATA  
Motorola Preferred Device  
N–Channel Enhancement–Mode Silicon Gate  
TMOS POWER FET  
12 AMPERES  
100 VOLTS  
This advanced TMOS E–FET is designed to withstand high  
energy in the avalanche and commutation modes. The new energy  
efficient design also offers a drain–to–source diode with a fast  
recovery time. Designed for low voltage, high speed switching  
applications in power supplies, converters and PWM motor  
controls, these devices are particularly well suited for bridge circuits  
where diode speed and commutating safe operating areas are  
critical and offer additional safety margin against unexpected  
voltage transients.  
R
= 0.16 OHM  
DS(on)  
D
•
•
•
Designed to Eliminate the Need for External Zener Transient  
Suppressor — Absorbs High Energy in the Avalanche Mode  
Commutating Safe Operating Area (CSOA) Specified for Use  
in Half and Full Bridge Circuits  
Source–to–Drain Diode Recovery Time Comparable to a Discrete  
Fast Recovery Diode  
G
S
•
•
Diode is Characterized for Use in Bridge Circuits  
I
and V Specified at Elevated Temperature  
DSS  
DS(on)  
CASE 221A–06, Style 5  
TO–220AB  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
100  
Unit  
Vdc  
Vdc  
Vdc  
Drain–Source Voltage  
V
DSS  
Drain–Gate Voltage (R  
= 1.0 MΩ)  
Gate–Source Voltage — Continuous  
V
DGR  
100  
GS  
V
GS  
±20  
±40  
Gate–Source Voltage — Single Pulse (t ≤ 50 µs)  
p
Drain Current — Continuous  
Drain Current — Single Pulse (t ≤ 10 µs)  
I
12  
30  
Adc  
D
I
p
DM  
Total Power Dissipation @ T = 25°C  
Derate above 25°C  
P
D
79  
0.53  
Watts  
W/°C  
C
Operating and Storage Temperature Range  
T , T  
stg  
–55 to 175  
290  
°C  
J
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T ≤ 175°C)  
J
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C  
E
AS  
mJ  
J
(V  
DD  
= 25 V, V = 10 V, L = 4.03 mH, R = 25 Ω, Peak I = 12 A)  
GS G L  
(See Figures 15, 16 and 17)  
THERMAL CHARACTERISTICS  
Thermal Resistance — Junction to Case  
Thermal Resistance — Junction to Ambient°  
R
R
1.9  
62.5  
°C/W  
°C  
θJC  
θJA  
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds  
T
260  
L
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
REV 1  
Motorola, Inc. 1996  
123456

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MTP12N10L NJSEMI

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