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MT9122 PDF预览

MT9122

更新时间: 2024-09-26 04:14:11
品牌 Logo 应用领域
MITEL /
页数 文件大小 规格书
32页 145K
描述
CMOS Dual Voice Echo Canceller with Tone Detection

MT9122 数据手册

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CMOS MT9122  
Dual Voice Echo Canceller  
with Tone Detection  
Preliminary Information  
ISSUE 5  
September 1996  
Features  
Ordering Information  
Dual channel 64ms or single channel 128ms  
echo cancellation  
MT9122AP  
MT9122AE  
28 Pin PLCC  
28 Pin PDIP  
Conforms to ITU-T G.165 requirements  
-40 °C to + 85 °C  
ITU-T G.165/G.164 disable tone detection  
supported on all audio paths  
Description  
Narrow-band signal detection  
Programmable double-talk detection threshold  
The MT9122 Voice Echo Canceller implements a  
cost effective solution for telephony voice-band echo  
Non-linear processor with adaptive suppression  
threshold and comfort noise insertion  
cancellation  
conforming  
to  
ITU-T  
G.165  
requirements. The MT9122 architecture contains two  
echo cancellers which can be configured to provide  
dual channel 64 millisecond echo cancellation or  
single channel 128 millisecond echo cancellation.  
The MT9122 supports ITU-T G.165 or G.164 tone  
disable requirements.  
Offset nulling of all PCM channels  
Controllerless mode or Controller mode with  
serial interface  
ST-BUS or variable-rate SSI PCM interfaces  
Selectable µ/A-Law ITU-T G.711; µ/A-Law Sign  
Mag; linear 2’s complement  
The MT9122 operates in two major modes:  
Controller or Controllerless. Controller mode allows  
access to an array of features for customizing the  
MT9122 operation. Controllerless mode is for  
applications where default register settings are  
sufficient.  
Per channel selectable 12 dB attenuator  
Transparent data transfer and mute option  
19.2 MHz master clock operation  
Applications  
Wireless Telephony  
Trunk echo cancellers  
Linear/  
µ/A-Law  
Non-Linear  
Processor  
Offset  
Null  
Linear/  
µ/A-Law  
Sin  
+
Sout  
-
Microprocessor  
Disable Tone  
Detector  
Interface  
Double-Talk  
Detector  
Programmable  
Bypass  
Narrow-Band  
Detector  
Disable Tone  
Detector  
Offset  
Null  
12dB  
Attenuator  
Linear/  
µ/A-Law  
Linear/  
µ/A-Law  
Rin  
ENA1  
ENB1  
Rout  
ENA2  
ENB2  
CONFIG1  
CONFIG2  
S1/DATA1  
S2/DATA2  
S3/CS  
NLP  
REV  
LAW  
Echo Canceller A  
Echo Canceller B  
FORMAT  
TD1  
S4/SCLK  
TD2  
VDD  
VSS  
PWRDN  
IC  
F0od  
F0i  
BCLK/C4i  
MCLK  
Figure 1 - Functional Block Diagram  
8-17  

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