Datasheet > MSM9560

MSM9560

更新时间： 2024-01-31 04:00:59

品牌	Logo	应用领域
冲电气 - OKI		/
页数	文件大小	规格书
8页	99K
描述
IC for FM Multiplex Data Demodulation

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数据手册

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MSM9560 数据手册

E2F0011-29-32

This version: Mar. 1999

Previous version: Jun. 1998

¡ Semiconductor

MSM9560

¡ Semiconductor

MSM9560

IC for FM Multiplex Data Demodulation

GENERAL DESCRIPTION

TheMSM9560isanICwhichdemodulatesFMcharactermultiplexsignalsintheDARC(DataRadio

Channel) formattoobtaindigitaldata. TheMSM9560operatesat4.5to5.5V. IntheDARCsystem,

16kbpsofdigitaldataL-MSKmodulatedat76kHzismultiplexedonanordinaryFMbroadcastbase

band signal.

The MSM9560 contains on one chip a band pass filter using a switched capacitor filter (SCF) and a

group of circuits including a frame synchronization circuit and an error correction circuit.

By connecting an external FM receiver and memory for temporary data storage and by controlling

them by the CPU, a system for obtaining digital data can easily be constructed.

The FM multiplex demodulation ICs, the MSM9500-series devices, are configured with minimum

functions;so they will, merely by making changes to the software of the external microcomputer, be

able to respond flexibly to the many FM multiplex broadcast services that are going to come about

in the future.

The MSM9560 is best suited to radios and information processing devices that support DARC FM

multiplex broadcasting. It is also best suited to car radios and car navigation systems.

*1 DARC is a registered trademark of NHK Engineering Services.

Any manufacturer licensed by NHK Engineering Service can manufacture and sell products that

utilize the DARC technology.

For detailed information on license, please contact:

NHK Engineering Service

Phone: 81-3481-2650

FEATURES

• Pin compatible with MSM9552/MSM9553

• Built-in bandpass filter (SCF)

• Built-in block synchronization circuit and frame synchronization circuit

• Setting of the number of synchronization protection steps can be changed

• Data clocks are regenerated by digital PLL

• 1T delay detection

• Built-in vertical and horizontal error correction circuits

• Built-in layer 4 and layer 2 CRC processing circuit

• Parallel interface with microcontroller

• Clock output for external devices (64 kHz to 8.192 MHz variable)

• Compatible with the international standard frame format (ITU-R Rec. BS1194)

• Power supply: 4.5 to 5.5 V

• Package:

44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM9560GS-2K)

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