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MR82C85/B PDF预览

MR82C85/B

更新时间： 2024-02-02 03:03:43
品牌 Logo 应用领域
英特矽尔 - INTERSIL 晶体外围集成电路电机控制器时钟
页数 文件大小 规格书
21页 351K
描述
CMOS Static Clock Controller/Generator

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MR82C85/B 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCN, LCC28,.45SQReach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.87JESD-30 代码：S-CQCC-N28
JESD-609代码：e0端子数量：28
最高工作温度：125 °C最低工作温度：-55 °C
最大输出时钟频率：24 MHz封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCN封装等效代码：LCC28,.45SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
主时钟/晶体标称频率：24 MHz认证状态：Not Qualified
筛选级别：38535Q/M;38534H;883B子类别：Clock Generators
最大压摆率：70 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches：1

MR82C85/B 数据手册

 浏览型号MR82C85/B的Datasheet PDF文件第2页浏览型号MR82C85/B的Datasheet PDF文件第3页浏览型号MR82C85/B的Datasheet PDF文件第4页浏览型号MR82C85/B的Datasheet PDF文件第5页浏览型号MR82C85/B的Datasheet PDF文件第6页浏览型号MR82C85/B的Datasheet PDF文件第7页 
TM  
82C85  
March 1997  
CMOS Static Clock Controller/Generator  
Features  
Description  
• Generates the System Clock For CMOS or NMOS  
Microprocessors and Peripherals  
• Complete Control Over System Operation for Very  
Low System Power  
The Intersil 82C85 Static CMOS Clock Controller/Genera-  
tor provides complete control of static CMOS system oper-  
ating modes and supports full speed, slow, stop-clock and  
stop-oscillator operation. While directly compatible with the  
Intersil 80C86 and 80C88 16-bit Static CMOS Microproces-  
sor Family, the 82C85 can also be used for general system  
clock control.  
- Stop-Oscillator  
- Low Frequency  
- Stop-Clock  
- Full Speed Operation  
For static system designs, separate signals are provided  
on the 82C85 for stop (S0, S1, S2/STOP) and start  
(START) control of the crystal oscillator and system clocks.  
A single control line (SLO/FST) determines 82C85 fast  
(crystal/EFI frequency divided by 3) or slow (crystal/EFI  
frequency divided by 768) mode operation. Automatic  
maximum mode 80C86 and 80C88 software HALT  
instruction decode logic in the 82C85 enables software-  
based clock control. Restart logic insures valid clock start-  
up and complete synchronization of system clocks.  
The 82C85 is manufactured using the Intersil advanced  
• DC to 25MHz Operation (DC to 8MHz System Clock)  
• Generates 50% and 33% Duty Cycle Clocks  
(Synchronized)  
• Uses a Parallel Mode Crystal Circuit or External  
Frequency Source  
• TTL Compatible Inputs/Outputs  
• 24 Lead Slimline Dual-In-Line or 28 Pad Square LCC  
Package Options  
• Single 5V Power Supply  
• Operating Temperature Range  
- C82C85 . . . . . . . . . . . . . . . . . . . . . . . . . .0 C to +70 C Scaled SAJI IV CMOS process. In addition to clock control  
- I82C85 . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to +85 C circuitry, the 82C85 also contains a crystal controlled  
o
o
o
o
o
o
- M82C85 . . . . . . . . . . . . . . . . . . . . . . . -55 C to +125 C oscillator (up to 25MHz), clock generation logic, complete  
“Ready” synchronization and reset logic. This permits the  
designer to tailor the system power-performance product to  
Ordering Information  
PART NUMBER  
CS82C85  
PACKAGE  
TEMP. RANGE PKG. NO.  
provide optimum performance at low power levels.  
o
o
28 Ld PLCC  
0 C to +70 C  
N28.45  
o
o
IS82C85  
-40 C to +85 C N28.45  
o
o
CD82C85  
24 Ld CERDIP  
0 C to +70 C  
F24.3  
o
o
ID82C85  
-40 C to +85 C F24.3  
o
o
MD82C85/B  
MR82C85/B  
-55 C to +125 C F24.3  
o
o
28 Pad CLCC -55 C to +125 C J28.A  
Pinouts  
28 LEAD PLCC, CLCC  
24 LEAD CERDIP  
TOP VIEW  
TOP VIEW  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CSYNC  
V
CC  
PCLK  
AEN1  
X1  
4
3
2
28 27 26  
1
3
X2  
25  
24  
23  
22  
21  
20  
19  
NC  
ASYNC  
EFI  
RDY1  
READY  
RDY2  
AEN2  
CLK  
5
6
7
8
9
4
ASYNC  
EFI  
RDY1  
5
READY  
RDY2  
F/C  
6
F/C  
OSC  
RES  
RESET  
7
AEN2  
OSC  
RES  
RESET  
S2/STOP  
S1  
GND 10  
NC 11  
8
CLK  
9
GND  
12 13 14 15  
17  
18  
16  
10  
11  
12  
CLK50  
START  
SLO/FST  
S0  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
FN2976.1  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
297  
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