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MPC5603PEFVLQ4 PDF预览

MPC5603PEFVLQ4

更新时间: 2024-10-06 04:39:55
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
72页 1382K
描述
IC,MICROCONTROLLER,32-BIT,CMOS,QFP,144PIN,PLASTIC

MPC5603PEFVLQ4 数据手册

 浏览型号MPC5603PEFVLQ4的Datasheet PDF文件第2页浏览型号MPC5603PEFVLQ4的Datasheet PDF文件第3页浏览型号MPC5603PEFVLQ4的Datasheet PDF文件第4页浏览型号MPC5603PEFVLQ4的Datasheet PDF文件第5页浏览型号MPC5603PEFVLQ4的Datasheet PDF文件第6页浏览型号MPC5603PEFVLQ4的Datasheet PDF文件第7页 
Freescale Semiconductor  
Data Sheet: Advance Information  
Document Number: MPC5604P  
Rev. 4, 7/2009  
MPC5604P  
100 LQFP  
144 LQFP  
14 x 14 x 1.4 mm  
20 x 20 x 1.4 mm  
MPC5604P Microcontroller  
Data Sheet  
• Two 10-bit A/D converters  
– Two × 13 input channels  
• High performance 64 MHz e200z0h CPU  
– 32-bit Power Architecture Book E CPU  
Variable Length Encoding (VLE)  
• Available memory  
– Conversion time < 1 µs including sampling time at full  
precision  
– Programmable Cross Triggering Unit (CTU)  
– Four analog watchdogs with interrupt capability  
• On-chip CAN/UART/FlexRay Bootstrap loader with Boot  
Assist Module (BAM)  
– As much as 512 KB on-chip flash memory, with ECC,  
with erase/program controller  
– As much as 40 KB on-chip RAM with ECC  
• Fail safe protection  
• FlexPWM unit  
– Programmable watchdog timer  
– Junction temperature sensor  
– Non-maskable interrupt  
– Eight complementary or independent outputs with ADC  
synchronization signals  
– Polarity control, reload unit  
– Fault collection unit  
– Integrated configurable dead time unit and inverter fault  
input pins  
• Nexus L2+ interface  
• Interrupts  
– 16-bit resolution, up to 2× f  
– 16-channel eDMA controller  
CPU  
– Lockable configuration  
• Clock generation  
– 16 priority level controller  
• General purpose I/Os  
– 4–40 MHz main oscillator  
– 16 MHz internal RC oscillator  
– Software controlled FMPLL capable of speeds as fast as  
64 MHz  
– Individually programmable as input, output or special  
function  
• Two general purpose eTimer units  
– Six timers each with up/down capabilities  
– 16-bit resolution, cascadable counters  
– Quadrature decode with rotation direction flag  
– Double buffer input capture and output compare  
– Communications interfaces  
Voltage supply  
– 3.3 V or 5 V supply for I/Os and ADC  
– On-chip single supply voltage regulator with external  
ballast transistor  
• Operating temperature ranges: –40 to 125 °C or –40 to  
105 °C  
– Two LINFlex channels (LIN 2.1)  
– Four DSPI channels with automatic chip select  
generation  
– FlexCAN interface (2.0B Active) with 32 message  
objects  
– Safety port based on FlexCAN with 32 message objects  
and up to 7.5 Mbit/s capability; usable as second CAN  
when not used as safety port  
– FlexRay™ module (V2.1) with dual or single channel,  
32 message objects and up to 10 Mbit/s  
This document contains information on a product under development. Freescale reserves the  
right to change or discontinue this product without notice.  
© Freescale Semiconductor, Inc., 2008, 2009. All rights reserved.  

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