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MPC5604B

更新时间: 2024-02-17 23:29:53
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 微控制器PC
页数 文件大小 规格书
72页 970K
描述
MPC5604B/C Microcontroller Data Sheet

MPC5604B 数据手册

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Freescale Semiconductor  
Data Sheet: Advance Information  
Document Number: MPC5604BC  
Rev. 4, 08/2009  
MPC5604B/C  
208 MAPBGA  
(17 x 17 x 1.7 mm)  
MPC5604B/C  
Microcontroller Data Sheet  
144 LQFP  
(20 x 20 x 1.4 mm)  
100 LQFP  
(14 x 14 x 1.4 mm)  
32-bit MCU family built on the Power Architecture™ for  
automotive body electronics applications  
Up to 6 enhanced full CAN (FlexCAN) modules  
with configurable buffers  
1 inter IC communication interface (I2C) module  
Features:  
Up to 123 configurable general purpose pins  
supporting input and output operations (package  
dependent)  
Single issue, 32-bit CPU core complex (e200z0)  
— Compliant with the Power Architecture™  
embedded category  
Real Time Counter (RTC) with clock source from  
128 kHz or 16 MHz internal RC oscillator  
supporting autonomous wakeup with 1 ms  
resolution with max timeout of 2 seconds  
— Includes an instruction set enhancement  
allowing variable length encoding (VLE) for  
code size footprint reduction. With the optional  
encoding of mixed 16-bit and 32-bit  
Up to 6 periodic interrupt timers (PIT) with 32-bit  
counter resolution  
instructions, it is possible to achieve significant  
code size footprint reduction.  
1 System Module Timer (STM)  
Up to 512 Kbytes on-chip flash supported with the  
flash controller  
Nexus development interface (NDI) per IEEE-ISTO  
5001-2003 Class Two Plus standard  
Up to 48 Kbytes on-chip SRAM  
Device/board boundary Scan testing supported with  
per Joint Test Action Group (JTAG) of IEEE (IEEE  
1149.1)  
Memory protection unit (MPU) with 8 region  
descriptors and 32-byte region granularity  
Interrupt controller (INTC) with 148 interrupt  
vectors, including 16 external interrupt sources and  
18 external interrupt/wakeup sources  
On-chip voltage regulator (VREG) for regulation of  
input supply for all internal levels  
Frequency modulated phase-locked loop (FMPLL)  
Crossbar switch architecture for concurrent access to  
peripherals, flash, or RAM from multiple bus  
masters  
Boot assist module (BAM) supports internal flash  
programming via a serial link (CAN or SCI)  
Timer supports input/output channels providing a  
range of 16-bit input capture, output compare, and  
pulse width modulation functions (eMIOS-lite)  
10-bit analog-to-digital converter (ADC)  
3 serial peripheral interface (DSPI) modules  
Up to 4 serial communication interface (LINFlex)  
modules  
This document contains information on a product under development. Freescale reserves the  
right to change or discontinue this product without notice.  
© Freescale Semiconductor, Inc., 2009. All rights reserved.  

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