Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5604BC
Rev. 9, 06/2011
MPC5604B/C
MAPBGA–225
QFN12
144 LQFP
208 MAPBGA
15 mm x 15 mm
##_mm_x_##mm
(20 x 20 x 1.4 mm)
(17 x 17 x 1.7 mm)
SOT-343R
PKG-TBD
MPC5604B/C
Microcontroller Data Sheet
##_mm_x_##mm
## mm x ## mm
100 LQFP
64 LQFP
TBD
(14 x 14 x 1.4 mm)
(10 x 10 x 1.4 mm)
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . 7
3.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Pad configuration during reset phases. . . . . . . . . . . . . 11
3.3 Voltage supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6 Functional ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.7 Nexus 2+ pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . 32
4.5 Recommended operating conditions . . . . . . . . . . . . . . 33
4.6 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
4.7 I/O pad electrical characteristics . . . . . . . . . . . . . . . . . 36
4.8 RESET electrical characteristics . . . . . . . . . . . . . . . . . 46
4.9 Power management electrical characteristics . . . . . . . 48
4.10 Power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
4.11 Flash memory electrical characteristics . . . . . . . . . . . . 55
4.12 Electromagnetic compatibility (EMC) characteristics . . 58
4.13 Fast external crystal oscillator (4 to 16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.14 Slow external crystal oscillator (32 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.15 FMPLL electrical characteristics. . . . . . . . . . . . . . . . . . 64
4.16 Fast internal RC oscillator (16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.17 Slow internal RC oscillator (128 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.18 ADC electrical characteristics. . . . . . . . . . . . . . . . . . . . 68
4.19 On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
5.1 Package mechanical data. . . . . . . . . . . . . . . . . . . . . . . 85
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Features
•
Single issue, 32-bit CPU core complex (e200z0)
2
3
®
— Compliant with the Power Architecture
embedded category
— Includes an instruction set enhancement
allowing variable length encoding (VLE) for
code size footprint reduction. With the optional
encoding of mixed 16-bit and 32-bit
instructions, it is possible to achieve significant
code size footprint reduction.
4
•
Up to 512 KB on-chip code flash supported with the
flash controller
•
•
•
64 (4 × 16) KB on-chip data flash memory with ECC
Up to 48 KB on-chip SRAM
Memory protection unit (MPU) with 8 region
descriptors and 32-byte region granularity
•
Interrupt controller (INTC) with 148 interrupt
vectors, including 16 external interrupt sources and
18 external interrupt/wakeup sources
•
•
Frequency modulated phase-locked loop (FMPLL)
Crossbar switch architecture for concurrent access to
peripherals, flash memory, or RAM from multiple
bus masters
•
•
Boot assist module (BAM) supports internal flash
programming via a serial link (CAN or SCI)
Timer supports input/output channels providing a
range of 16-bit input capture, output compare, and
pulse width modulation functions (eMIOS-lite)
5
•
•
•
10-bit analog-to-digital converter (ADC)
3 serial peripheral interface (DSPI) modules
6
7
Up to 4 serial communication interface (LINFlex)
modules
Appendix AAbbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009-2011. All rights reserved.
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