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MP7628CD PDF预览

MP7628CD

更新时间: 2024-11-21 13:11:47
品牌 Logo 应用领域
艾科嘉 - EXAR 转换器
页数 文件大小 规格书
12页 127K
描述
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MP7628CD 数据手册

 浏览型号MP7628CD的Datasheet PDF文件第2页浏览型号MP7628CD的Datasheet PDF文件第3页浏览型号MP7628CD的Datasheet PDF文件第4页浏览型号MP7628CD的Datasheet PDF文件第5页浏览型号MP7628CD的Datasheet PDF文件第6页浏览型号MP7628CD的Datasheet PDF文件第7页 
MP7628  
5 V CMOS  
Quad Multiplying 8-Bit  
Digital-to-Analog Converter  
FEATURES  
APPLICATIONS  
Readback Capability for all DACs  
On-Chip Latches for All DACs  
Linearity Grades to +1/8 LSB  
Single Supply Voltage (5 Volt)  
DACs Matched to 1%  
Four Quadrant Multiplication  
Microprocessor TTL/CMOS Compatible  
Latch-Up Free  
Microprocessor Controlled Gain and Attenuation  
Circuits  
Microprocessor Controlled/Programmable  
Power Supplies  
Hardware Redundant Applications Requiring  
Data Readback  
Dual Version: MP7529B  
Data is transferred into any of the four DAC data latches via  
common 8-bit TTL/CMOS compatible input port. Control inputs  
DS1, DS2 and A/B determine which DAC is to be loaded. The  
MP7628’s load cycle is similar to the write cycle of a random ac-  
cess memory and the device is bus compatible with most 8-bit  
microprocessors.  
GENERAL DESCRIPTION  
The MP7628 is a quad 8-bit Digital-to-Analog Converter de-  
signed using a decoded DAC architecture featuring excellent  
DAC-to-DAC matching and guaranteed monotonicity.  
Separate on-chip latches are provided for each DAC to allow  
easy microprocessor interface.  
The device operates at +5 V power supply and dissipates  
less than 5mW.  
The readback function allows the user to poll or read the data  
latches, eliminating the need for storing information in RAM. In  
the event the microprocessor power supply is interrupted, it can  
poll the DACs to establish the last known system state.  
All DACs offer excellent four quadrant multiplication charac-  
teristics with a separate reference input and feedback resistor  
for each DAC.  
SIMPLIFIED BLOCK DIAGRAM  
V
DD  
V
REFB  
V
REFA  
R
FBA  
LATCH A  
R
FB  
DAC A  
I
OUT1A  
THREE-STATE  
BUFFER  
I
I
/
DB0  
OUT2A  
OUT2B  
BI-  
DIRECTIONAL  
LINE  
(LSB)  
DATA BUS  
DB7  
(MSB)  
LATCH B  
DRIVER  
DAC B  
DAC C  
I
OUT1B  
THREE-STATE  
BUFFER  
R
R
FB  
FB  
R
R
FBB  
FBC  
LATCH C  
I
OUT1C  
THREE-STATE  
BUFFER  
I
I
/
A/B  
OUT2C  
OUT2D  
CONTROL  
LOGIC  
R/W  
LATCH D  
DAC D  
DS1  
DS2  
I
OUT1D  
THREE-STATE  
BUFFER  
R
FB  
R
FBD  
GND  
V
REFC  
V
REFD  
Rev. 2.00  
1

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