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MP5001DQ-LF-Z PDF预览

MP5001DQ-LF-Z

更新时间: 2024-02-27 01:15:43
品牌 Logo 应用领域
芯源 - MPS 光电二极管
页数 文件大小 规格书
12页 372K
描述
Power Supply Support Circuit, Fixed, 1 Channel, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229VEED-5, QFN-10

MP5001DQ-LF-Z 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:SON
包装说明:HVSON,针数:10
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:8 weeks
风险等级:5.14可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:S-PDSO-N10
JESD-609代码:e3长度:3 mm
湿度敏感等级:1信道数量:1
功能数量:1端子数量:10
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装形状:SQUARE封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):10 V
最小供电电压 (Vsup):4 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

MP5001DQ-LF-Z 数据手册

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MP5001  
5V, 1A- 5A Programmable Current  
Limit Switch  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
The MP5001 is a protection device designed to  
protect circuitry on the output (source) from  
transients on input (VCC). It also protects VCC from  
undesired shorts and transients coming from the  
source.  
Integrated 44mPower FET withstand 20V  
Enable/Fault Pin  
Adjustable Slew Rate for Output Voltage  
Adjustable Current Limit  
Thermal Protection  
Over Voltage Limit  
At start up, inrush current is limited by limiting the  
slew rate at the source. The slew rate is  
controlled by a small capacitor at the dv/dt pin.  
The dv/dt pin has an internal circuit that allows  
the customer to float this pin (no connect) and  
still receive a 1.1ms ramp time at the source.  
APPLICATIONS  
Hot Swap  
PC Cards  
Cell Phones  
Laptops  
The max load at the output (source) is current  
limited. This is accomplished by utilizing a sense  
FET topology. The magnitude of the current limit  
is controlled by an external resistor from the I-  
Limit pin to the Source pin.  
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks  
of Monolithic Power Systems, Inc.  
An internal charge pump drives the gate of the  
power device, allowing a very low on-resistance  
DMOS power FET of just 44m.  
The source is protected from the VCC input being  
too low or too high. Under Voltage Lockout  
(UVLO) assures that VCC is above the minimum  
operating threshold, before the power device is  
turned on. If VCC goes above the high output  
threshold, the source voltage will be limited.  
TYPICAL APPLICATION  
RLIMIT  
VIN  
11  
VCC  
6
5
N/C  
Source  
Source  
VOUT  
4
7
I-Limit  
MP5001  
8
3
2
1
EN  
Enable/Fault Source  
9
dv/dt  
GND  
Source  
Source  
C
dv/dt  
10  
MP5001 Rev.0.94  
9/2/2014  
www.MonolithicPower.com  
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.  
© 2014 MPS. All Rights Reserved.  
1

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