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MP3274 PDF预览

MP3274

更新时间: 2024-11-20 21:55:39
品牌 Logo 应用领域
艾科嘉 - EXAR /
页数 文件大小 规格书
16页 173K
描述
Fault Protected 32 Channel, 12-Bit Data Acquisition Subsystem

MP3274 数据手册

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MP3274  
Fault Protected 32 Channel, 12-Bit  
Data Acquisition Subsystem  
FEATURES  
Complete 32-Channel 12-Bit A/D Converter  
with Sample & Hold, Reference, Clock and  
3-State Outputs  
Fast Conversion, less than 15µS  
Microprocessor Bus Interface  
Parallel or Serial Data Output Modes  
65 ns Bus Access Time  
Precision Reference for Long Term Stability and  
Low Gain T.C.  
Guaranteed Linearity Over Temperature  
Guaranteed Performance at +12/–5 V, ±12 & ±15 V  
Low Power (3 mW per Channel Typical)  
16 Channel Version: MP3276 & MP3275  
Remote Analog Ground Sensing  
Overvoltage Protected Input (50 V over the  
Supply Voltages)  
GENERAL DESCRIPTION  
The MP3274 is a complete 32-channel, 12-bit Data Acquisi-  
tion Subsystem with 3-state output buffers for direct interfacing  
to 16-bit microprocessor buses. Implemented using an ad-  
vanced BiCMOS process, the converter combines a32-channel  
passiveovervoltageprotectedmultiplexerinstrumentationamp,  
a sample & hold, a SAR, a 12-bit decoded D/A, a comparator, a  
precision reference and the control logic to achieve an accurate,  
repeated conversion in less than 15µs, and a mux/instrumenta-  
tion amp settling period of less than 10µs.  
condition can exist on unselected channels without disrupting  
the measured channel or operation of the MP3274! The internal  
4 V reference has sufficient output current to provide other sys-  
temreferenceneeds. Precisionthinfilmscalingandoffsetresis-  
tors are laser trimmed to provide for less than 2 LSB INL for +10  
V inputs on all channels.  
In addition, the MP3274 will output either full scale (0111 ....)  
for overrange and – full scale (1000....) for underrange condi-  
tions. This greatly simplifies microprocessor software develop-  
ment.  
A unique input design provides input overvoltage protection  
to 50 V over the supply voltages. Therefore, an overvoltage  
SIMPLIFIED BLOCK DIAGRAM  
GND REF.  
V
V
AGND  
Comp  
DD  
CC  
AB0-4  
(5 pins)  
+
5
32 Ch.  
MUX  
AIN0-31  
(32 pins)  
REF IN /2  
32  
AGND  
2
V
REF  
REF IN  
VDAC  
4 V  
REF  
REF OUT  
12  
CLK  
SAR  
12  
AGND  
3
Control  
Logic  
Latch/  
Shift Register  
3-State  
Drivers  
PXS  
DB0-DB11  
DGND  
V
AGND WR RD  
ADEN  
STL  
EE  
CS  
STS  
Rev. 4.00  
1

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