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MN101C74F(100MLGA) PDF预览

MN101C74F(100MLGA)

更新时间： 2024-11-16 08:18:51
品牌 Logo 应用领域
松下 - PANASONIC 微控制器
页数 文件大小 规格书
3页 337K
描述
Microcontroller, 8-Bit, MROM, PBGA100,

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中文翻译

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MN101C74F(100MLGA) 技术参数

是否Rohs认证： 符合生命周期：Active
Reach Compliance Code：unknown风险等级：5.84
具有ADC：YES地址总线宽度：
位大小：8DAC 通道：NO
DMA 通道：YES外部数据总线宽度：
端子数量：100PWM 通道：YES
封装主体材料：PLASTIC/EPOXY封装代码：LGA
封装等效代码：LGA100(UNSPEC)封装形状：RECTANGULAR
封装形式：GRID ARRAY电源：3 V
认证状态：Not QualifiedRAM（字节）：6144
ROM（单词）：98304ROM可编程性：MROM
速度：10 MHz子类别：Microcontrollers
最大压摆率：1.9 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES端子形式：NO LEAD
端子位置：BOTTOM

MN101C74F(100MLGA) 数据手册

 浏览型号MN101C74F(100MLGA)的Datasheet PDF文件第2页浏览型号MN101C74F(100MLGA)的Datasheet PDF文件第3页 
MN101C74 Series  
Type  
MN101C74F  
MN101C74G  
6K  
MN101CF74G  
Internal ROM type  
ROM (byte)  
Mask ROM  
FLASH  
96K  
128K  
RAM (byte)  
Package (Lead-free)  
LQFP100-P-1414, MLGA100-L-1010, QFP100-P-1818B  
0.1 µs (at 3.0 V to 3.6 V, 10 MHz)  
0.235 µs (at 1.8 V to 3.6 V, 4.25 MHz)*  
62.5 µs (at 1.8 V to 3.6 V, 32 kHz)*  
Minimum Instruction  
Execution Time  
*: The lower limit for operation guarantee for flash memory built-in type is 2.2 V.  
Interrupts  
RESET. Watchdog. External 0 to 5. External 6 (key interrupt dedicated). Timer 0 to 3. Timer 6. Timer 7 (2 systems). Timer 8 (2 systems).  
Time base. Serial 0 (2 systems). Serial 1 (2 systems). Serial 3. Serial 4. A/D conversion finish. Automatic transfer finish  
Timer Counter  
8-bit timer × 5  
Timer 0 ..................Square-wave/8-bit PWM output. Event count. Remote control carrier output. Simple pulse width measurement.  
Added pulse (2-bit) type PWM output. Square-wave/PWM output to large current terminal PC3 possible  
Timer 1 ..................Square-wave output. Event count. Synchronous output event  
Timer 2 ..................Square-wave output. Added pulse (2-bit) type PWM output. PWM output. Serial transfer clock output. Event  
count. Synchronous output event. Simple pulse width measurement. Square-wave/PWM output to large current  
terminal PC5 possible  
Timer 3 ..................Square-wave output. Event count. Serial transfer clock output  
Timer 6 ..................8-bit freerun timer  
Timer 0, 1 can be cascade-connected  
Timer 2, 3 can be cascade-connected  
16-bit timer × 2  
Timer 7 ..................Square-wave output. 16-bit PWM output (cycle/duty continuous variable). Event count. Synchronous output  
event. Pulse width measurement. Input capture. Real time output control. High performance IGBT output. Square-  
wave/PWM output to large current terminal PC4 possible  
Timer 8 ..................Square-wave/16-bit PWM output (duty continuous variable). Event count. Pulse width measurement. Input  
capture. Square-wave/PWM output to large current terminal PC6 possible  
Timer 7, 8 can be cascade-connected: Square-wave output, PWM is possible as a 32-bit timer  
Time base timer: One-minute count setting  
Watchdog timer × 1  
Serial interface  
Synchronous type/UART (full-duplex) × 2: Serial 0, 1  
Synchronous type/Single-master I2C × 1: Serial 3  
I2C slave × 1: Serial 4  
Serial 4...................I2C high-speed transfer mode. 7-bit/10-bit address setting. General call  
DMA controller  
Maximum transfer cycles: 255  
Starting factor: External request. Various types of interrupt. Software  
Transfer mode: 1-byte transfer. Word transfer. Burst transfer  
I/O Pins  
I/O  
87 : Common use. Specified pull-up resistor available. Input/output selectable (bit unit)  
A/D converter  
10-bit × 16 channels (with S/H)  
Display control function  
LCD: 47 segments × 4 commons (Static, 1/2, 1/3, or 1/4 duty)  
LCD power supply separated from VDD (usable if VDD ≤ VLCD ≤ 3.6 V)  
LCD power step-up circuit contained (3/2 times, 2 times and 3 times)  
LCD power shunt resistance contained  
Special Ports  
Buzzer output. Inverted buzzer output. Remote control carrier output. High-current drive port  
MAD00048GEM  
123

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