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MMDJ-65609EV-35 PDF预览

MMDJ-65609EV-35

更新时间: 2024-09-30 14:53:51
品牌 Logo 应用领域
爱特美尔 - ATMEL ATM异步传输模式静态存储器内存集成电路
页数 文件大小 规格书
9页 56K
描述
Standard SRAM, 128KX8, 35ns, CMOS, 0.400 INCH, FP-32

MMDJ-65609EV-35 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:0.400 INCH, FP-32针数:32
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.77
最长访问时间:35 nsJESD-30 代码:R-XDFP-F32
长度:20.825 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:128KX8
封装主体材料:UNSPECIFIED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:2.72 mm最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
宽度:10.415 mmBase Number Matches:1

MMDJ-65609EV-35 数据手册

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M65609E  
128 K 8 Very Low Power CMOS SRAM Rad Tolerant  
Introduction  
The M65609E is a very low power CMOS static RAM  
organized as 131072 × 8 bits.  
access time at 35 ns over the full military temperature  
range. The high stability of the 6T cell provides  
excellent protection against soft errors due to noise.  
Atmel Wireless & Microcontrollers brings the solution  
to applications where fast computing is as mandatory as  
low consumption, such as aerospace electronics,  
portable instruments, or embarked systems.  
The M65609E is processed according to the methods of  
the latest revision of the MIL STD 883 (class B or S),  
ESA SCC 9000 or QML.  
Utilizing an array of six transistors (6T) memory cells,  
the M65609E combines an extremely low standby  
supply current (Typical value = 20 µA) with a fast  
It is produced on the same process as the MH1RT sea of  
gates series.  
Features  
D Operating voltage: 3.3 V  
D Access time: 35, 70 ns  
D 400 Mils width package  
D TTL compatible inputs and outputs  
D Asynchronous  
D Very low power consumption  
active : 200 mW (Max)  
D Designed on 0.35 micron process  
D Latch up immune  
standby : 70 µW (Typ)  
data retention: 50 µW (typ)  
D Wide temperature Range : –55 To +125°C  
D 200 Krads capability  
D SEU LET better than 3 MeV  
Interface  
Block Diagram  
9
10  
Rev. B – February 5, 2001  
1
Preliminary  

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