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MM74HCT373_05 PDF预览

MM74HCT373_05

更新时间: 2024-11-20 05:08:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器
页数 文件大小 规格书
10页 122K
描述
3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

MM74HCT373_05 数据手册

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February 1984  
Revised May 2005  
MM74HCT373 MM74HCT374  
3-STATE Octal D-Type Latch •  
3-STATE Octal D-Type Flip-Flop  
General Description  
Features  
TTL input characteristic compatible  
The  
MM74HCT373  
octal  
D-type  
latches  
and  
MM74HCT374 Octal D-type flip flops advanced silicon-gate  
CMOS technology, which provides the inherent benefits of  
low power consumption and wide power supply range, but  
are LS-TTL input and output characteristic & pin-out com-  
patible. The 3-STATE outputs are capable of driving 15 LS-  
TTL loads. All inputs are protected from damage due to  
static discharge by internal diodes to VCC and ground.  
Typical propagation delay: 20 ns  
Low input current: 1 A maximum  
Low quiescent current: 80 A maximum  
Compatible with bus-oriented systems  
Output drive capability: 15 LS-TTL loads  
When the MM74HCT373 LATCH ENABLE input is HIGH,  
the Q outputs will follow the D inputs. When the LATCH  
ENABLE goes LOW, data at the D inputs will be retained at  
the outputs until LATCH ENABLE returns HIGH again.  
When a high logic level is applied to the OUTPUT CON-  
TROL input, all outputs go to a high impedance state,  
regardless of what signals are present at the other inputs  
and the state of the storage elements.  
The MM74HCT374 are positive edge triggered flip-flops.  
Data at the D inputs, meeting the setup and hold time  
requirements, are transferred to the Q outputs on positive  
going transitions of the CLOCK (CK) input. When a high  
logic level is applied to the OUTPUT CONTROL (OC)  
input, all outputs go to a high impedance state, regardless  
of what signals are present at the other inputs and the state  
of the storage elements.  
MM74HCT devices are intended to interface between TTL  
and NMOS components and standard CMOS devices.  
These parts are also plug in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
Ordering Code:  
Order Number  
MM74HCT373WM  
MM74HCT373SJ  
MM74HCT373MTC  
MM74HCT373N  
MM74HCT374WM  
MM74HCT374SJ  
MM74HCT374MTC  
MM74HCT374N  
Package Number  
M20B  
Package Descriptions  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20B  
M20D  
MTC20  
N20A  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
© 2005 Fairchild Semiconductor Corporation  
DS005367  
www.fairchildsemi.com  

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