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MM74HC4060SJ PDF预览

MM74HC4060SJ

更新时间: 2024-11-01 23:02:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器触发器逻辑集成电路光电二极管输出元件输入元件
页数 文件大小 规格书
8页 86K
描述
14 Stage Binary Counter

MM74HC4060SJ 数据手册

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August 1984  
Revised February 1999  
MM74HC4060  
14 Stage Binary Counter  
This device is pin equivalent to the CD4060. All inputs are  
protected from damage due to static discharge by protec-  
tion diodes to VCC and ground.  
General Description  
The MM74HC4060 is a high speed binary ripple carry  
counter. These counters are implemented utilizing  
advanced silicon-gate CMOS technology to achieve speed  
performance similar to LS-TTL logic while retaining the low  
power and high noise immunity of CMOS.  
Features  
Typical propagation delay: 16 ns  
The MM74HC4060 is a 14-stage counter, which device  
increments on the falling edge (negative transition) of the  
input clock, and all their outputs are reset to a low level by  
Wide operating voltage range: 2–6V  
Low input current: 1 µA maximum  
Low quiescent current: 80 µA maximum (74 Series)  
Output drive capability: 10 LS-TTL loads  
applying  
a logical high on their reset input. The  
MM74HC4060 also has two additional inputs to enable  
easy connection of either an RC or crystal oscillator.  
Ordering Code:  
Order Number  
MM74HC4060M  
MM74HC4060SJ  
MM74HC4060MTC  
MM74HC4060N  
Package Number  
M16A  
Package Description  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
M16D  
MTC16  
N16E  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005354.prf  
www.fairchildsemi.com  

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