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MM74HC4050SJX PDF预览

MM74HC4050SJX

更新时间: 2024-11-06 05:08:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 72K
描述
Hex Inverting Logic Level Down Converter . Hex Logic Level Down Converter

MM74HC4050SJX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:5.30 MM, EIAJ TYPE2, SOP-16
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.27
Is Samacsys:N其他特性:CMOS-TTL LEVEL TRANSLATOR
系列:HC/UHJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUFFER
最大I(ol):0.004 A功能数量:6
输入次数:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:20 ns传播延迟(tpd):100 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.1 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

MM74HC4050SJX 数据手册

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February 1984  
Revised October 1999  
MM74HC4049 • MM74HC4050  
Hex Inverting Logic Level Down Converter •  
Hex Logic Level Down Converter  
ple buffer or inverter without level translation. The  
MM74HC4049 is pin and functionally compatible to the  
CD4049BC and the MM74HC4050 is compatible to the  
CD4050BC  
General Description  
The MM74HC4049 and the MM74HC4050 utilize  
advanced silicon-gate CMOS technology, and have a mod-  
ified input protection structure that enables these parts to  
be used as logic level translators which will convert high  
level logic to a low level logic while operating from the low  
logic supply. For example, 0–15V CMOS logic can be con-  
verted to 0–5V logic when using a 5V supply. The modified  
input protection has no diode connected to VCC, thus allow-  
Features  
Typical propagation delay: 8 ns  
Wide power supply range: 2V–6V  
Low quiescent supply current: 20 µA maximum (74HC)  
Fanout of 10 LS-TTL loads  
ing the input voltage to exceed the supply. The lower zener  
diode protects the input from both positive and negative  
static voltages. In addition each part can be used as a sim-  
Ordering Code:  
Order Number  
Package Number Package Description  
MM74HC4049M  
MM74HC4049SJ  
MM74HC4049MTC  
MM74HC4049N  
MM74HC4050M  
MM74HC4050SJ  
MM74HC4050MTC  
MM74HC4050N  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153. 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M16A  
M16D  
MTC16  
N16E  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153. 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
MM74HC4049  
MM74HC4050  
© 1999 Fairchild Semiconductor Corporation  
DS005214  
www.fairchildsemi.com  

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