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MM74HC153M PDF预览

MM74HC153M

更新时间: 2024-11-27 13:11:39
品牌 Logo 应用领域
美国国家半导体 - NSC 复用器
页数 文件大小 规格书
4页 114K
描述
IC HC/UH SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, PLASTIC, SO-16, Multiplexer/Demultiplexer

MM74HC153M 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:PLASTIC, SO-16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.16
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:MULTIPLEXER功能数量:2
输入次数:4输出次数:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V传播延迟(tpd):44 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

MM74HC153M 数据手册

 浏览型号MM74HC153M的Datasheet PDF文件第2页浏览型号MM74HC153M的Datasheet PDF文件第3页浏览型号MM74HC153M的Datasheet PDF文件第4页 
January 1988  
MM54HC153/MM74HC153  
Dual 4-Input Multiplexer  
General Description  
This 4-to-1 line multiplexer utilizes advanced silicon-gate  
CMOS technology. It has the low power consumption and  
high noise immunity of standard CMOS integrated circuits.  
This device is fully buffered, allowing it to drive 10 LS-TTL  
loads. Information on the data inputs of each multiplexer is  
selected by the address on the A and B inputs, and is pre-  
sented on the Y outputs. Each multiplexer possesses a  
strobe input which enables it when taken to a low logic lev-  
el. When a high logic level is applied to a strobe input, the  
output of its associated multiplexer is taken low.  
are protected from damage due to static discharge by inter-  
and ground.  
nal diode clamps to V  
CC  
Features  
Y
Typical propagation delay: 24 ns  
Y
Y
Y
Y
Wide power supply range: 2V6V  
Low quiescent current: 80 mA maximum (74HC Series)  
Low input current: 1 mA maximum  
Fanout of 10 LS-TTL loads  
The 54HC/74HC logic family is functionally and pinout com-  
patible with the standard 54LS/74LS logic family. All inputs  
Connection Diagram  
Dual-In-Line Package  
TL/F/5107–1  
Top View  
Order Number MM54HC153 or MM74HC153  
Truth Table  
Select  
Inputs  
Data Inputs  
Strobe  
G
Output  
Y
B
A
C0  
C1  
C2  
C3  
X
L
L
X
L
L
H
H
L
L
H
H
X
L
X
X
X
L
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
L
H
L
L
L
L
L
L
L
L
L
L
H
L
H
X
X
X
X
X
X
L
L
H
X
X
X
X
H
L
H
L
H
H
H
H
H
H
Select inputs A and B are common to both sections.  
e
e
e
low level, X don’t care.  
H
high level, L  
C
1995 National Semiconductor Corporation  
TL/F/5107  
RRD-B30M105/Printed in U. S. A.  

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